WM8956 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

WM8956

Hi-Fi DAC with 1W Stereo Class D Speaker Drivers and Headphone Drivers

Cirrus Logic 

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WM8956

Production Data

REGISTER

ADDRESS

R24 (18h)

Additional

Control (2)

BIT

LABEL

6

HPSWEN

5

HPSWPOL

R27 (1Bh)

3

OUT3CAP

Additional

Control (3)

R48 (30h)

Additional

Control (4)

3:2 HPSEL[1:0]

R23 (17h)

0

TOEN

Additional

Control (1)

1

TOCLKSEL

Table 24 Headphone Jack Detect

DEFAULT

DESCRIPTION

0

Headphone Switch Enable

0 = Headphone switch disabled

1 = Headphone switch enabled

0

Headphone Switch Polarity

0 = HPDETECT high = headphone

1 = HPDETECT high = speaker

0

Capless Mode Headphone Switch

Enable

0 = OUT3 unaffected by jack detect

events

1 = OUT3 enabled and disabled together

with HP_L and HP_R in response to jack

detect events

00

Headphone Switch Input Select

0X = GPIO1 used for jack detect input

(Requires pin to be configured as a

GPIO using ALRCGPIO)

10 = JD2 used for jack detect input

11 = JD3 used for jack detect input

0

Slow Clock Enable (Must be enabled for

jack detect de-bounce)

0 = Slow Clock Disabled

1 = Slow Clock Enabled

0

Slow Clock Selection (Used for volume

update timeouts and for jack detect

debounce)

0 = SYSCLK / 221 (Slower Response)

1 = SYSCLK / 219 (Faster Response)

Figure 20 Example Headset Detection Circuit using Normally-Open Switch

Figure 21 Example Headset Detection Circuit using Normally-Closed Switch

w

PD, November 2011, Rev 4.1

40

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