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XRT7302IQ80 View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
XRT7302IQ80
Exar
Exar Corporation Exar
'XRT7302IQ80' PDF : 77 Pages View PDF
XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
áç
REV. 1.1.0
PIN DESCRIPTION
PIN #
48
SIGNAL NAME
RLOS2
49
GNDD
50
RPOS2
51
RNEG2
52
RxClk2
TYPE
O
****
O
O
O
DESCRIPTION
Receive Loss of Signal Output Indicator - Channel 2
This output pin toggles "high" if Receive Section of Channel 2 has detected a
"Loss of Signal" Condition in the incoming line signal.
The exact criteria that the XRT7302 device uses to declare an "LOS Condi-
tion" depends upon whether the device is operating in the E3 or DS3/STS-1
Mode.
Receive Digital Ground - Channel 2
Receive Positive Pulse Output - Channel 2:
This output pin will pulse "high" whenever the Receive Section of Channel 2
has received a "Positive Polarity" pulse, in the incoming line signal, at the
RTIP/RRing inputs.
NOTE: Note: If the B3ZS/HDB3 Decoder (within Channel 2) is "enabled" then
the "zero suppression" patterns, in the incoming line signal (such as: "00V",
"000V", "B0V", "B00V") will not be reflected at this output.
Receive Negative Pulse Output - Channel 2:
This output pin will pulse "high" whenever the Receive Section of Channel 2
has received a "Negative Polarity" pulse, in the incoming line signal, at the
RTIP/RRing inputs.
NOTE: Note: If the B3ZS/HDB3 Decoder (within Channel 2) is "enabled" then
the "zero suppression" patterns, in the incoming line signal (such as: "00V",
"000V", "B0V", "B00V") will not be reflected at this output.
Receive Clock Output pin - Channel 2:
This output pin is the Recovered Clock signal from the incoming line signal,
which is being received via Channel 2. The receive section of Channel 2 will
output data via the RPOS2 and RNEG2 output pins, on the rising edge of this
clock signal.
NOTE: The user can configure the Receive Section of Channel 2 to update the
data on the RPOS2 and RNEG2 output pins, on the falling edge of RxClk2, by
doing one of the following:
1. If the XRT7302 is operating in the Hardware Mode
Pulling the "RClkINV" pin (pin 42) to "high".
2. If the XRT7302 is operating in the Host Mode
Writing a "1" into the "RClk(n)INV" bit-field within the Command Register.
12
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