XRT83SH38ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
6.5 Motorola Mode Programmed I/O Access (Asynchronous)
If the LIU is interfaced to a Motorola type µP, it should be configured to operate in the Motorola mode. Motorola
type programmed I/O Read and Write operations are described below.
Motorola Mode Read Cycle
Whenever a Motorola type µP wishes to read the contents of a register, it should do the following.
1. Place the address of the target register on the address bus input pins ADDR[7:0].
2. While the µP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
µP and the LIU microprocessor interface block.
3. The µP should then toggle the AS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4. Next, the µP should indicate that this current bus cycle is a Read operation by pulling the R/W input pin
"High".
5. Toggle the DS input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6. After the µP toggles the DS signal "Low", the LIU will toggle the DTACK output pin "Low". The LIU does
this in order to inform the µP that the data is available to be read by the µP, and that it is ready for the next
command.
7. After the µP detects the DTACK signal and has read the data, it can terminate the Read Cycle by toggling
the DS input pin "High".
Motorola Mode Write Cycle
Whenever a motorola type µP wishes to write a byte or word of data into a register within the LIU, it should do
the following.
1. Place the address of the target register on the address bus input pins ADDR[7:0].
2. While the µP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
µP and the LIU microprocessor interface block.
3. The µP should then toggle the AS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4. Next, the µP should indicate that this current bus cycle is a Write operation by pulling the R/W input pin
"Low".
5. Toggle the DS input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6. After the µP toggles the DS signal "Low", the LIU will toggle the DTACK output pin "Low". The LIU does
this in order to inform the µP that the data has been written into the internal register location, and that it is
ready for the next command.
7. After the µP detects the DTACK signal and has read the data, it can terminate the Read Cycle by toggling
the DS input pin "High".
The Motorola Read and Write timing diagram is shown in Figure 37. The timing specifications are shown in
Table 19.
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