XRT83SH38ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
TABLE 26: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION
BIT
NAME
CHANNEL 0-7 (0X03H-0X73H)
FUNCTION
Register
Type
Default
Value
(HW reset)
D1
INSBER Insert Bit Error
R/W
0
When this bit transitions from a "0" to a "1", a bit error will be
inserted in the transmitted QRSS/PRBS pattern. The state of this
bit will be sampled on the rising edge of TCLK. To ensure proper
operation, it is recommended to write a "0" to this bit before writing
a "1".
D0
Resereved
TABLE 27: MICROPROCESSOR REGISTER 0X04H BIT DESCRIPTION
CHANNEL 0-7(0X04H-0X74H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved This Register Bit is Not Used.
D6
DMOIE Digital Monitor Output Interrupt Enable
0 = Masks the DMO function
1 = Enables Interrupt Generation
R/W
0
D5
FLSIE FIFO Limit Status Interrupt Enable
0 = Masks the FLS function
1 = Enables Interrupt Generation
R/W
0
D4
LCV/OFIE Line Code Violation / Counter Overflow Interrupt Enable
0 = Masks the LCV/OF function
1 = Enables Interrupt Generation
R/W
0
D3
Reserved This Register Bit is Not Used.
D2
AISIE Alarm Indication Signal Interrupt Enable
0 = Masks the AIS function
1 = Enables Interrupt Generation
R/W
0
D1
RLOSIE Receiver Loss of Signal Interrupt Enable
0 = Masks the RLOS function
1 = Enables Interrupt Generation
R/W
0
D0
QRPDIE Quasi Random Signal Source Interrupt Enable
0 = Masks the QRPD function
1 = Enables Interrupt Generation
R/W
0
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