XRT91L31 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L31' PDF : 41 Pages View PDF
XRT91L31
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
PIN DESCRIPTION
REV. 1.0.2
NAME
LEVEL
TYPE
PIN
DESCRIPTION
FRAMEPULSE
LVTTL,
O
LVCMOS
30 Sonet Frame Alignment Pulse
This pin will generate a single pulse for an RXPCLKO clock
period upon the detection of the third frame alignment A2 byte
whenever the OOF input pin is held High. The parallel received
data output bus will then be byte aligned to this newly recov-
ered SONET/SDH frame.
CAP1P
CAP2P
Analog
-
39 CDR Non-polarized External Filter Capacitor
42 C1 = 0.47μF ± 10% tolerance
(Isolate from noise and place close to pin)
CAP1N
CAP2N
Analog
-
40 CDR Non-polarized External Filter Capacitor
41 C2 = 0.47μF ± 10% tolerance
(Isolate from noise and place close to pin)
DLOSDIS
LVTTL,
I
LVCMOS
7
LOS (Los of Signal) Detect Disable
Disables internal LOS monitoring and automatic muting of
RXDO[7:0] upon LOS detection. LOS is declared when a string
of 128 consecutive zeros occur on the line. LOS condition is
cleared when the 16 or more pulse transitions is detected for
128 bit period sliding window (see Figure 7.)
"Low" = Monitor and Mute received data upon LOS declaration
"High" = Disable internal LOS monitoring
LOSEXT
SE-LVPECL
I
33 LOS or Signal Detect Input from Optical Module
Active "Low." When active, this pin can force the received data
output bus RXDO[7:0] to a logic state of ’0’ per Figure 7.
"Low" = Forced LOS
"High" = Normal Operation
POWER AND GROUND
PIN DESCRIPTION
NAME
TYPE
VDD3.3
PWR
AVDD3.3_TX PWR
AVDD3.3_RX PWR
PIN
18, 31, 34, 47, 61
38
43
DESCRIPTION
3.3V CMOS Power Supply
VDD3.3 should be isolated from the Analog VDD power supplies.
Use a ferrite bead along with an internal power plane separation.
The VDD3.3 power supply pins should have bypass capacitors to
the nearest ground.
Analog 3.3V Transmitter Power Supply
AVDD3.3_TX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_TX power supply pins should
have bypass capacitors to the nearest ground.
Analog 3.3V Receiver Power Supply
AVDD3.3_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_RX power supply pins should
have bypass capacitors to the nearest ground.
12
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