PRELIMINARY
XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
4.0 DIAGNOSTIC FEATURES
4.1 Serial Remote Loopback
The serial remote loopback function is activated by setting RLOOPS "High". When serial remote loopback is
activated, the high-speed serial receive data from RXIN is presented at the high speed transmit output TXOP/
N, and the high-speed recovered clock is selected and presented to the high-speed transmit clock output
TXCLKP/N. During serial remote loopback, the high-speed receive data (RXIN) is also converted to parallel
data and presented at the low-speed receive parallel interface RXD[3:0]P/N. The recovered receive clock is
also divided by 4 and presented at the low-speed clock output RXCLKP/N to synchronize the transfer of the 4-
bit received parallel data. A simplified block diagram of serial remote loopback is shown in Figure 14.
FIGURE 14. SERIAL REMOTE LOOPBACK
Serial Remote Loopback
FIFO
PISO
Re-Timer
Output Drivers
Tx Serial Output
Rx Parallel Output
SIPO
CDR
Input MUX
Rx Serial Input
4.2 Parallel Remote Loopback
RLOOPP controls a more comprehensive version of remote loop-back that can also be used in conjunction
with the de-jitter PLL that is phase locked to the recovered receive clock. In this mode, the received signal
traverses the limiting amplifier, is processed by the CDR, and is sent through the serial to parallel converter. At
this point, the 4-bit parallel data and clock are looped back to the transmit FIFO. Concurrently, if receive clock
jitter attenuation is also employed, the received clock is divided down in frequency and presented to the input
of the integrated phase/frequency detector and is compared to the frequency of a VCXO that is connected to
the VCXO_INP/N inputs. With the LOOPTIME configured to use the recovered receive clock as the reference
and VCXO_SEL asserted, the VCXO is phase locked to the recovered receive clock. The de-jittered clock is
then used to retime the transmitter, resulting in the re-transmission of the de-jittered received data out of
TXOP/N. A simplified block diagram of parallel remote loopback is shown in Figure 15.
FIGURE 15. PARALLEL REMOTE LOOPBACK
Parallel Remote Loopback
FIFO
PISO
Re-Timer
Output Drivers
Tx Serial Output
Rx Parallel Output
SIPO
CDR
Input MUX
Rx Serial Input
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