XWM8739SEDS/V View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'XWM8739SEDS/V' PDF : 37 Pages View PDF
WM8739
Production Data
The device can be powered off by writing to the POWEROFF bit of the Power Down register. In
POWEROFF mode the Control Interface and a small portion of the digital remain active. The
analogue VMID reference is disabled. As in STANDBY mode the crystal oscillator pin can be
independently controlled. Refer to Table 17.
DESCRIPTION
1
0
X
X
1
1
X
X
Table 17 Power Off Mode
POWEROFF, but with Crystal
Oscillator OSC available
POWEROFF, Crystal
oscillator not-available
DEVICE RESETTING
The WM8739 contains a power on reset circuit that resets the internal state of the device to a known
condition. The power on reset is applied as DCVDD powers on and released only after the voltage
level of DCVDD crosses a minimum turn off threshold. If DCVDD later falls below a minimum turn on
threshold voltage then the power on reset is re-applied. The threshold voltages and associated
hysteresis are shown in the Electrical Characteristics table.
The user also has the ability to reset the device to a known state under software control as shown in
the table below.
REGISTER
ADDRESS
0001111
Reset Register
BIT
LABEL
8:0 RESET
Table 18 Software Control of Reset
DEFAULT
DESCRIPTION
not reset
Reset Register
Writing 00000000 to register resets
device
When using the software reset. In 3-wire mode the reset is applied on the rising edge of CSB and
released on the next rising edge of SCLK. In 2-wire mode the reset is applied for the duration of the
ACK signal (approximately 1 SCLK period, refer to Figure 20).
w
PD, Rev 4.2, July 2008
28
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