Z8E00110PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z8E00110PSC' PDF : 46 Pages View PDF
Z8E001
Z8Plus OTP Microcontroller
ZiLOG
OSCILLATOR OPERATION
The Z8E001 MCU uses a Pierce oscillator with an internal
feedback resistor (Figure 14). The advantages of this circuit
are low-cost, large output signal, low-power level in the
crystal, stability with respect to VCC and temperature, and
low impedances (not disturbed by stray effects).
One draw back is the requirement for high gain in the am-
plifier to compensate for feedback path losses. The oscil-
lator amplifies its own noise at start-up until it settles at the
frequency that satisfies the gain/phase requirements (A x B
= 1; where A = Vo/Vi is the gain of the amplifier and B =
Vi/Vo is the gain of the feedback element). The total phase
shift around the loop is forced to zero (360 degrees). VIN
must be in phase with itself; therefore, the amplifier/inverter
provides a 180-degree phase shift, and the feedback element
is forced to provide the other 180-degree phase shift.
R1 is a resistive component placed from output to input of
the amplifier. The purpose of this feedback is to bias the am-
plifier in its linear region and provide the start-up transition.
Capacitor C2, combined with the amplifier output resis-
tance, provides a small phase shift. It also provides some
attenuation of overtones.
Capacitor C1, combined with the crystal resistance, pro-
vides an additional phase shift.
C1 and C2 can affect the start-up time if they increase dra-
matically in size. As C1 and C2 increase, the start-up time
increases until the oscillator reaches a point where it does
not start up any more.
It is recommended for fast and reliable oscillator start-up
(over the manufacturing process range) that the load capac-
itors be sized as low as possible without resulting in over-
tone operation.
Layout
Traces connecting crystal, caps, and the Z8E001 oscillator
pins should be as short and wide as possible, to reduce par-
asitic inductance and resistance. The components (caps,
crystal, resistors) should be placed as close as possible to
the oscillator pins of the Z8E001.
The traces from the oscillator pins of the IC and the ground
side of the lead caps should be guarded from all other traces
(clock, VCC, address/data lines, system ground) to reduce
cross talk and noise injection. Guarding is usually accom-
plished by keeping other traces and system ground trace
planes away from the oscillator circuit, and by placing a
Z8E001 device VSS ground ring around the traces/compo-
nents. The ground side of the oscillator lead caps should be
connected to a single trace to the Z8E001 VSS (GND) pin.
It should not be shared with any other system ground trace
or components except at the Z8E001 device VSS pin. The
objective is to prevent differential system ground noise in-
jection into the oscillator (Figure 15).
Z8E001
VSS
A
V1
RI
V0
XTAL1
C1
XTAL2
C2
Figure 14. Pierce Oscillator with Internal Feedback
Circuit
Indications of an Unreliable Design
There are two major indicators that are used in working de-
signs to determine their reliability over full lot and temper-
ature variations. They are:
Start-up Time. If start-up time is excessive, or varies wide-
ly from unit to unit, there is probably a gain problem. To
fix the problem, the capacitors C1/C2 require reduction.
The amplifier gain is either not adequate at frequency, or
the crystal Rs are too large.
Output Level. The signal at the amplifier output should
swing from ground to VCC to indicate adequate gain in the
amplifier. As the oscillator starts up, the signal amplitude
grows until clipping occurs. At that point, the loop gain is
effectively reduced to unity, and constant oscillation is
achieved. A signal of less than 2.5 volts peak-to-peak is an
indication that low gain can be a problem. Either C1 or C2
should be made smaller, or a low-resistance crystal should
be used.
Circuit Board Design Rules
The following circuit board design rules are suggested:
¥ To prevent induced noise, the crystal and load capacitors
should be physically located as close to the Z8E001 as
possible.
¥ Signal lines should not run parallel to the clock oscillator
inputs. In particular, the crystal input circuitry and the in-
ternal system clock output should be separated as much
as possible.
22
PRELIMINARY
DS001101-Z8X0400
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