Z8E00110PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z8E00110PSC' PDF : 46 Pages View PDF
ZiLOG
¥ VCC power lines should be separated from the clock os-
cillator input circuitry.
Z8E001
Z8Plus OTP Microcontroller
¥ Resistivity between XTAL1 or XTAL2 (and the other
pins) should be greater than 10 MΩ.
XTAL1 17
C1
Z8E001
XTAL2 16
C2
VSS 15
Clock Generator Circuit
Signals A B
(Parallel Traces
Must Be Avoided)
Signal C
XTAL1 17
Z8E001
XTAL2 16
Z8E001
PB0
X1
X2
VSS
VCC
Board Design Example
(Top View)
Figure 15. Circuit Board Design Rules
Crystals and Resonators
Crystals and ceramic resonators (Figure 16) should have the
following characteristics to ensure proper oscillation:
Crystal Cut
Mode
Crystal Capacitance
Load Capacitance
Resistance
AT (crystal only)
Parallel, Fundamental Mode
<7pF
10pF < CL < 220 pF,
15 typical
100 ohms max
Depending on the operation frequency, the oscillator can re-
quire additional capacitors, C1 and C2, as shown in Figure
16 and Figure 17. The capacitance values are dependent on
the manufacturerÕs crystal specifications.
DS001101-Z8X0400
PRELIMINARY
23
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