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1EDI2004AS View Datasheet(PDF) - Infineon Technologies

Part Name
Description
MFG CO.
1EDI2004AS
Infineon
Infineon Technologies Infineon
'1EDI2004AS' PDF : 138 Pages View PDF
EiceDRIVERTM SIL
1EDI2004AS
Functional Description
Configured Mode (OPM3)
Configured Mode is the mode where the device is ready to be enabled. When OPM3 is active, the device is in
Disabled State.
The following exhaustive list of events bring the device in Mode OPM3:
• Reception of a valid EXIT_CMODE command while Mode OPM2 active.
• Event Class A while Mode OPM4 active.
Active Mode (OPM4)
The Active Mode corresponds to the normal operating mode of the device. When OPM4 is active, the device is
in Active State. The following exhaustive list of event bring the device in Active Mode:
• Invalid to Valid Transition on signal EN while Mode OPM3 active.
Verification Mode (OPM5)
Verification Mode is the mode where intrusive verification functions can be started. When OPM5 is active, the
device is in disabled state.
The following exhaustive list of event bring the device in Verification Mode:
• Reception of a valid ENTER_VMODE command while Mode OPM2 active.
• Occurrence of an Event Class A while Mode OPM6 active.
After a transition from Mode OPM2 to OPM5, an internal watchdog timer is started. If after time tVMTO, the
device has not left both modes OPM5 or OPM6, a time-out event occurs and an Event Class B is generated.
Weak Active Mode (OPM6)
Weak Active Mode is the mode where the device can be activated to run diagnosis tests at system level. When
OPM6 is active, the device is in Enabled State. A PWM turn-on command issues a Weak Turn-On on the
secondary side.
The following exhaustive list of event bring the device in Weak Active Mode:
• Invalid to Valid Transition on signal EN while Mode OPM5 active.
The watchdog counter started when entering Mode OPM5 is not reset when entering OPM6.
Implementation Notes related to State Transitions
• An Event Class A or Class B detected on the secondary side lead to an immediate reaction of the device’s
output stage. Due to the latency of the inter-chip communication, the notification on the primary side is
slightly delayed.
• The activation of signal NFLTA or NFLTB is simultaneous to the corresponding state transition on the
primary side.
• It is possible to change the operating mode while a failure condition is present. This may however lead to
a new immediate error notification and state transition.
Data Sheet
35
Rev. 2.0
2019-01-16
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