28F256L18 View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
'28F256L18' PDF : 106 Pages View PDF
Numonyx™ StrataFlash® Wireless Memory (L18)
Table 21: Command Codes and Definitions (Sheet 2 of 3)
Mode
Code Device Mode
Description
Write
Write
Write
Write
Write
Write
Erase
Suspend
Block Locking/
Unlocking
0x40
0x10
0xE8
0xD0
0x80
0xD0
0x20
0xD0
0xB0
0xD0
0x60
0x01
0xD0
0x2F
Word Program
Setup
First cycle of a 2-cycle programming command; prepares the CUI for a write
operation. On the next write cycle, the address and data are latched and the WSM
executes the programming algorithm at the addressed location. During program
operations, the partition responds only to Read Status Register and Program
Suspend commands. CE# or OE# must be toggled to update the Status Register in
asynchronous read. CE# or ADV# must be toggled to update the Status Register
Data for synchronous Non-array read. The Read Array command must be issued to
read array data after programming has finished.
Alternate Word
Program
Setup
Equivalent to the Word Program Setup command, 0x40.
Buffered
Program
This command loads a variable number of bytes up to the buffer size of 32 words
onto the program buffer.
Buffered
Program
Confirm
The confirm command is Issued after the data streaming for writing into the buffer
is done. This instructs the WSM to perform the Buffered Program algorithm, writing
the data from the buffer to the flash memory array.
Buffered
Enhanced
Factory
Programming
Setup
First cycle of a 2-cycle command; initiates Buffered Enhanced Factory Program
mode (Buffered EFP). The CUI then waits for the Buffered EFP Confirm command,
0xD0, that initiates the Buffered EFP algorithm. All other commands are ignored
when Buffered EFP mode begins.
Buffered EFP
Confirm
If the previous command was Buffered EFP Setup (0x80), the CUI latches the
address and data, and prepares the device for Buffered EFP mode.
Block Erase
Setup
First cycle of a 2-cycle command; prepares the CUI for a block-erase operation.
The WSM performs the erase algorithm on the block addressed by the Erase
Confirm command. If the next command is not the Erase Confirm (0xD0)
command, the CUI sets Status Register bits SR[4] and SR[5], and places the
addressed partition in read status register mode.
Block Erase
Confirm
If the first command was Block Erase Setup (0x20), the CUI latches the address
and data, and the WSM erases the addressed block. During block-erase operations,
the partition responds only to Read Status Register and Erase Suspend commands.
CE# or OE# must be toggled to update the Status Register in asynchronous read.
CE# or ADV# must be toggled to update the Status Register Data for synchronous
Non-array read.
Program or
Erase Suspend
This command issued to any device address initiates a suspend of the currently-
executing program or block erase operation. The Status Register indicates
successful suspend operation by setting either SR[2] (program suspended) or
SR[6] (erase suspended), along with SR[7] (ready). The Write State Machine
remains in the suspend mode regardless of control signal states (except for RST#
asserted).
Suspend
Resume
This command issued to any device address resumes the suspended program or
block-erase operation.
Lock Block
Setup
First cycle of a 2-cycle command; prepares the CUI for block lock configuration
changes. If the next command is not Block Lock (0x01), Block Unlock (0xD0), or
Block Lock-Down (0x2F), the CUI sets Status Register bits SR[4] and SR[5],
indicating a command sequence error.
Lock Block
If the previous command was Block Lock Setup (0x60), the addressed block is
locked.
Unlock Block
If the previous command was Block Lock Setup (0x60), the addressed block is
unlocked. If the addressed block is in a lock-down state, the operation has no
effect.
Lock-Down
Block
If the previous command was Block Lock Setup (0x60), the addressed block is
locked down.
Datasheet
46
November 2007
251902-12
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