2ED21091S06F View Datasheet(PDF) - Infineon Technologies
Part Name
Description
MFG CO.
'2ED21091S06F' PDF : 26 Pages View PDF
2ED21091S06F
650 V half bridge gate driver with integrated bootstrap diode
5.3
Deadtime
This family of HVICs features integrated deadtime protection circuitry. The deadtime is programmable for
2ED21091S06F, it is greater design flexibility. The deadtime feature inserts a time period (a minimum deadtime)
in which both the high- and low-side power switches are held off; this is done to ensure that the power switch
being turned off has fully turned off before the second power switch is turned on. This minimum deadtime is
automatically inserted whenever the external deadtime is shorter than interal deadtime; external deadtimes
larger than internal deadtime are not modified by the gate driver.
The deadtime circuitry of 2ED21091S06F is matched with respect to the high- and low-side outputs. Figure 8
defines the two deadtime parameters (i.e., DTLO-HO and DTHO-LO); the deadtime matching parameter (MDT)
associated with the 2ED21091S06F specifies the maximum difference between DTLO-HO and DTHO-LO.
Figure 8 Deadtime matching waveform definition
2ED21091S06F provides greater design flexibility with a programmable dead-time feature using an external
resistor (RDT) connected between the DT pin and COM pin as shown in Figure 9. A decoupling ceramic capacitor
(CDT > 1nF) is recommended which is parallel with RDT.
Integrated
RBS DBS
Up to 650V
VCC
1 VCC
VB 8
IN
2 IN
HO 7
CDT RDT
3 DT/SD
VS 6
TO LOAD
4 COM
LO 5
Figure 9
2ED21091S06F
Adjustable dead-time feature settable with a resistor
Datasheet
www.infineon.com/soi
10 of 26
V 2.22
2020-07-02
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