2ED21091S06F
650 V half bridge gate driver with integrated bootstrap diode
Figure 10 shows the linear relationship between the resistor (RDT) and dead time. Based on the end application,
designers can program the dead time with the different RDT. In case the DT pin is left open or short to COM, the
gate driver enters protection mode switching off the output stages. Hence this pin has to be connected to COM
pin with a 12 kΩ to 150 kΩ resistor based on application requirements. A 12 kΩ provides a minimum deadtime of
540 ns and 150 kΩ provides a maximum deadtime of 2.7 us.
Programmable dead time in 2ED21091S06J
4
3.5
3
2.5
2
1.5
1
0.5
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
RDT (kΩ)
Figure 10 Variation of dead time vs. external resistor (RDT)
5.4
Matched propagation delays
The 2ED21091S06F is designed with propagation delay matching circuitry. With this feature, the IC’s response at
the output to a signal at the input requires approximately the same time duration (i.e., tON, tOFF) for both the low-
side channels and the high-side channels; the maximum difference is specified by the delay matching parameter
(MT). The propagation turn-on delay (tON) of the 2ED21091S06F is matched to the propagation turn-off delay (tOFF).
Figure 11 Delay matching waveform definition
Datasheet
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V 2.22
2020-07-02