2ED21091S06F View Datasheet(PDF) - Infineon Technologies
Part Name
Description
MFG CO.
'2ED21091S06F' PDF : 26 Pages View PDF
2ED21091S06F
650 V half bridge gate driver with integrated bootstrap diode
5.5
Shutdown input
2ED21091S06F provides a shutdown functionality that allows to disable the output. When /SD in pulled down
(the disable voltage is lower than VSD,TH) the output is disable. Once the external pull down is released, the output
is active. The relationships between the input, output and enable signals of the 2ED21091S06F are illustrated
below in Figure 7/ 12. From these figures, we can see the definition of the parameter (i.e. tSD) associated with this
device.
Note: If the DT/SD is floating, the output is aslo disable.
Figure 12 Shutdown waveform definitions
5.6
Input logic compatibility
The input pins are based on a TTL and CMOS compatible input-threshold logic that is independent of the Vcc
supply voltage. Figure 13 illustrates an input signal to the 2ED21091S06F, its input threshold values, and the logic
state of the IC as a result of the input signal. The typical high threshold (VIH) of 2.1 V and typical low threshold (VIL)
of 0.9 V. The input pins are conveniently driven with logic level PWM control signals derived from 3.3 V and 5 V
digital power-controller devices. Wider hysteresis (typically 0.9 V) offers enhanced noise immunity compared to
traditional TTL logic implementations, where the hysteresis is typically less than 0.5 V. 2ED21091S06F also
features tight control of the input pin threshold voltage levels which eases system design considerations and
ensures stable operation across temperature. The 2ED21091S06F has input pins that are capable of sustaining
voltages higher than the bias voltage applied on the Vcc pin of the device.
Figure 13 IN input thresholds
Datasheet
www.infineon.com/soi
12 of 26
V 2.22
2020-07-02
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