2ED2109 (4) S06F (J)
650 V half bridge gate driver with integrated bootstrap diode
5.3
Deadtime
This family of HVICs features integrated deadtime protection circuitry. The deadtime is fixed for 2ED2109S06F; is
programmable for 2ED21094S06J, it is greater design flexibility. The deadtime feature inserts a time period (a
minimum deadtime) in which both the high- and low-side power switches are held off; this is done to ensure that
the power switch being turned off has fully turned off before the second power switch is turned on. This minimum
deadtime is automatically inserted whenever the external deadtime is shorter than interal deadtime; external
deadtimes larger than internal deadtime are not modified by the gate driver.
The deadtime circuitry of 2ED2109 (4) S06F (J) is matched with respect to the high- and low-side outputs. Figure
8 defines the two deadtime parameters (i.e., DTLO-HO and DTHO-LO); the deadtime matching parameter (MDT)
associated with the 2ED2109 (4) S06F (J) specifies the maximum difference between DTLO-HO and DTHO-LO.
Figure 8 Deadtime matching waveform definition
The 14-pin variant (2ED21094S06J) provides greater design flexibility with a programmable dead-time feature
using an external resistor (RDT) connected between the DT pin and VSS pin as shown in Figure 9.
Integrated
RBS DBS
Up to 650V
VCC
IN
SD
VSS
1 VCC
2 IN
3 SD
RDT
4 DT
5 VSS
6 COM
7 LO
14
VB 13
HO 12
VS 11
10
9
8
TO LOAD
Figure 9
2ED21094S06J
14-pin half-bridge variants having adjustable dead-time feature settable with a resistor
Datasheet
www.infineon.com/soi
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V 2.022
2020-07-02