ACS8514 SETS Buddy
ADVANCED COMMS & SENSING FINAL
DATASHEET
Multiplexed Mode
In Multiplexed Mode, the device is configured to interface with microprocessors (e.g., Intel's 80x86 family) which share
bus signals between address and data. Figure 9 and Figure 10 show the timing diagrams of write and read accesses.
Figure 9 Read Access Timing in MULTIPLEXED Mode
Table 14 Read Access Timing in MULTIPLEXED Mode (for use with Figure 9 )
Symbol
tsu1
tsu2
td1
td2
td3
td4
td5
tpw1
tpw2
tpw3
th1
th2
th3
tp1
tp2
tp2
Parameter
Setup AD address valid to ALEfalling edge
Setup CSBfalling edge to RDBfalling edge
Delay RDBfalling edge to AD data valid (consecutive Read - Read)
Delay RDBfalling edge to AD data valid (consecutive Write - Read)
Delay CSBfalling edge to RDY active
Delay RDBfalling edge to RDYfalling edge
Delay RDBrising edge to AD data high-Z
Delay CSBrising edge to RDY high-Z
RDB Low time (consecutive Read - Read)
RDB Low time (consecutive Write - Read)
RDY Low time (consecutive Read - Read)
RDY Low time (consecutive Write - Read)
ALE High time
Hold AD address valid after ALEfalling edge
Hold CSB Low after RDBrising edge
Hold RDB Low after RDYrising edge
Time between ALEfalling edge and RDBfalling edge
Time between (consecutive Read - Read) accesses (RDBrising edge to
ALErising edge)
Time between (consecutive Write - Read) accesses (RDBrising edge to
ALErising edge)
MIN
5 ns
0 ns
12 ns
17 ns
-
-
-
-
35 ns
35 ns
20 ns
20 ns
5 ns
9 ns
0 ns
0 ns
0 ns
20 ns
160 ns
TYP
-
-
-
-
-
-
-
-
60 ns
200 ns
-
-
-
-
-
-
-
-
-
MAX
-
-
40 ns
193 ns
13 ns
15 ns
10 ns
10 ns
-
-
40 ns
185 ns
-
-
-
-
-
-
-
Revision 3.00 April 2007 © Semtech Corp.
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