ACS8514 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
ACS8514
Synchronous Equipment Timing Source Partner IC for 2nd T4 DPLL, Accurate Monitoring & Input Extender
Semtech Corporation
'ACS8514' PDF : 86 Pages View PDF
ACS8514 SETS Buddy
ADVANCED COMMS & SENSING FINAL
DATASHEET
Table 19 Register Map
Register Name
RO = Read Only
R/W = Read/Write
7 (MSB)
6
Data Bit
5
4
3
2
1
0 (LSB)
chip_id (RO)
00 52
01 21
Device part number [7:0] 8 least significant bits of the chip ID
Device part number [15:8] 8 most significant bits of the chip ID
chip_revision (RO)
02 00
Chip revision number [7:0]
test_register1. (R/W)
03 14
phase_
disable_180
Set to zero
8k Edge
Set to zero
Set to zero
alarm
Polarity
sts_interrupts. (R/W)
05 FF
I8 valid
I7 valid
I6 valid change I5 valid I4 valid change
I3 valid
I2 valid
I1 valid
change
change
change
change
change
change
06 3F MonDPLL_ Mon_ref_
I14 valid
I13 valid
I12 valid
I11 valid
I10 valid
I9 valid
state
failed
change
change
change
change
change
change
sts_current_DPLL_frequency., 07 00
sts_current_DPLL_frequency[18:16]
OC/OD
sts_interrupts. (R/W)
08 50
T4_status
T4_inputs_ AMI2_Viol
AMI2_LOS
AMI1_Viol
AMI1_LOS
failed
sts_operating. (RO)
09 41
T4_DPLL_Lock Mon_DPLL_fre T4_DPLL_
q_soft_alarm
freq_
soft_alarm
sts_priority_table. (RO)
0A 00
Highest priority validated source
Currently selected source
0B 00
2 nd highest priority validated source
sts_current_DPLL_frequency.
0C 00
Bits [7:0] of current DPLL frequency
(RO)
0D 00
Bits [15:8] of current DPLL frequency
07 00
Bits [18:16] of current DPLL frequency
sts_sources_valid. (RO)
0E 00
I8
I7
I6
I5
I4
I3
I2
I1
0F 00
I14
I13
I12
I11
I10
I9
sts_reference_sources. (RO)
Out-of-band Out-of-band
No activity Phase lock Out-of-band Out-of band
No activity
Phase lock
Status of inputs:
alarm (soft) alarm (hard)
alarm
alarm
alarm (soft) alarm (hard)
alarm
alarm
(1 & 2). 10 66
Status of I2 Input
Status of I1 Input
(3 & 4). 11 66
Status of I4 Input
Status of I3 Input
(5 & 6). 12 66
Status of I6 Input
Status of I5 Input
(7 & 8). 13 66
Status of I8 Input
Status of I7 Input
(9 & 10). 14 66
Status of I10 Input
Status of I9 Input
(11 & 12). 15 66
Status of I12 Input
Status of I11 Input
(13 & 14). 16 66
Status of I14 Input
Status of I13 Input
cnfg_ref_selection_priority (1 & 2). 18 32
programmed_priority I2
programmed_priority I1
(R/W) (3 & 4). 19 54
programmed_priority I4
programmed_priority I3
(5 & 6). 1A 76
programmed_priority I6
programmed_priority I5
(7 & 8). 1B 98
programmed_priority I8
programmed_priority I7
(9 & 10). 1C BA
programmed_priority I10
programmed_priority I9
(11 & 12). 1D DC
programmed_priority I12
programmed_priority I11
(13 & 14). 1E FE
programmed_priority I14
programmed_priority I13
cnfg_ref_source_frequency(R/W) 1. 20 00
Set to zero
bucket_id_1
Set to zero
2. 21 00
Set to zero
bucket_id_2
Set to zero
3. 22 00
divn_3
lock8k_3
bucket_id_3
reference_source_frequency_3
4. 23 00
divn_4
lock8k_4
bucket_id_4
reference_source_frequency_4
5. 24 03
divn_5
lock8k_5
bucket_id_5
reference_source_frequency_5
6. 25 03
divn_6
lock8k_6
bucket_id_6
reference_source_frequency_6
7. 26 03
divn_7
lock8k_7
bucket_id_7
reference_source_frequency_7
8. 27 03
divn_8
lock8k_8
bucket_id_8
reference_source_frequency_8
9. 28 03
divn_9
lock8k_9
bucket_id_9
reference_source_frequency_9
10. 29 03
divn_10
lock8k_10
bucket_id_10
reference_source_frequency_10
11. 2A 03
divn_11
lock8k_11
bucket_id_11
reference_source_frequency_11
12. 2B 01
divn_12
lock8k_12
bucket_id_12
reference_source_frequency_12
13. 2C 01
divn_13
lock8k_13
bucket_id_13
reference_source_frequency_13
14. 2D 01
divn_14
lock8k_14
bucket_id_14
reference_source_frequency_14
cnfg_sts_remote_sources_valid. 30 FF
Remote status, channels <8:1>
(R/W)
31 3F
Remote status, channels <14:9>
force_select_reference_source. 33 0F
Mon_DPLL_ref_source
(R/W)
cnfg_input_mode. ( R/W)
34 C2
Set to 0
Set to 1
Set to 0
Set to 0
Set to 0
ip_sonsdhb
Set to 1
cnfg_T4_path. (R/W)
35 40
Set to 0 T4_dig_feed-
Set to 0
T4_forced_reference_source
back
cnfg_differential_inputs. (R/W) 36 02
I6_PECL
I5_LVDS
cnfg_uPsel_pins. (RO)
37 02
Microprocessor type
cnfg_auto_bw_sel. (R/W)
3B FB
Set to 0
Mon_lim_int
cnfg_nominal_frequency(R/W)[7:0] 3C 99
Nominal frequency [7:0]
.
[15:8]. 3D 99
Nominal frequency [15:8]
cnfg_average_frequency. [7:0] 3E 00
average_frequency[7:0]
(R/W) [15:8] 3F 00
average_frequency_value[15:8]
Revision 3.00 April 2007 © Semtech Corp.
Page 30
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