ACS8514 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
ACS8514
Synchronous Equipment Timing Source Partner IC for 2nd T4 DPLL, Accurate Monitoring & Input Extender
Semtech Corporation
'ACS8514' PDF : 86 Pages View PDF
ACS8514 SETS Buddy
ADVANCED COMMS & SENSING FINAL
DATASHEET
Register Descriptions
Address(hex): 00
Register Name chip_id
Description
(RO) 8 least significant bits
of the chip ID.
Default Value 0101 0010
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit No.
[7:0]
chip_id[7:0]
Description
Bit Value
chip_id
Least significant byte of the 2-byte device ID
52 (hex)
Value Description
2152 hex = 8530 decimal = chip type
8530 is indicated since this is the internal die
type used, even though it is packaged as
ACS8514
Address(hex): 01
Register Name chip_id
Description
(RO) 8 most significant bits
of the chip ID.
Default Value 0010 0001
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit No.
Description
chip_id[15:8]
Bit Value
Value Description
[7:0]
chip_id
Most significant byte of the 2-byte device ID
21 (hex)
2152 hex = 8530 decimal = chip type
See register 00 description
Address(hex): 02
Register Name chip_revision
Bit 7
Bit 6
Bit 5
Bit No.
[7:0]
Description
chip_revision
Silicon revision of the device
Description
(RO) Silicon revision of the device. Default Value 0000 0000
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
chip_revision[7:0]
Bit Value
Value Description
00 (hex)
Version revision
Address(hex): 03
Register Name test_register1
Description
Bit 7
Bit 6
Bit 5
Bit 4
phase_alarm disable_180
Bit No.
7
Description
phase_alarm ( phase alarm (R/O))
Instantaneous result from Monitor DPLL
(R/W) Register containing various Default Value 0001 0100
test controls (not normally used).
Bit 3
Bit 2
Bit 1
Bit 0
Set to zero
Bit Value
8k Edge
Polarity
Set to zero
Value Description
Set to zero
0
Monitor DPLL reporting phase locked.
1
Monitor DPLL reporting phase lost.
Revision 3.00 April 2007 © Semtech Corp.
Page 32
www.semtech.com
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