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ACS8515REV2.1T View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
'ACS8515REV2.1T' PDF : 50 Pages View PDF
ACS8515 Rev2.1 LC/P
ADVANCED COMMUNICATIONS
Table 11. Register Map Description (continued).
FINAL
Addr. Parameter Name
(Hex)
cnfg_ref_source_frequency
22
23
24
25
28
cnfg_operating_mode
32
cnfg_ref_selection
33
Description
This register is used to set up each of the input reference sources.
Default
Value (bin)
Bits (7:6) of each byte define the operation undertaken on the input frequency, in accordance
with the following key:
00
The input frequency is fed directly into the DPLL (default).
01
The input frequency is internally divided down to 8 kHz, before being fed into the
DPLL. (For high jitter tolerance).
10
Unsupported configuration - do not use
11
Uses the division coefficient stored in registers 46 & 47 (cnfg_freq_divn) to divide
the input by this value prior to being fed into the DPLL. The frequency monitors
must be disabled. The divided down frequency should equal 8 kHz. The frequency
(3:0) should be set to the nearest spot frequency just below the actual input
frequency. The DivN feature works for input frequencies between 1.544 MHz and
100 MHz.
Bits (5:4) together define which leaky bucket settings (0-3) are used, as defined in registers 50
to 5F. (default 00).
Bits (3:0) define the frequency of the reference source in accordance with the following key:
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
8 kHz (default SEC1, SEC2)
1544 kHz(SONET)/2048 kHz(SDH) (As defined by Register 34, bit 2)
6.48 MHz
19.44 MHz (default SEC1DIFF, SEC2DIFF, SEC3)
25.92 MHz
38.88 MHz
51.84 MHz
77.76 MHz
155.52 MHz
2 kHz
4 kHz
Frequency of reference source SEC1
Frequency of reference source SEC2
Frequency of reference source SEC1DIFF
Frequency of reference source SEC2DIFF
Frequency of reference source SEC3
This register is used to force the device into a desired operating state, represented by the binary
values shown in Figure 10. Value 0 (hex) allows the control state machine to operate
automatically.
Bits (7:3) Unused
00000000
00000000
00000011
00000011
00000011
XXXXX000
Bits (2:0) Desired operating state (as per Figure 10)
This register is used to force the device to select a particular input reference source, irrespective
of its priority. Writing to this register temporarily raises the selected input to priority '1'. Provided
no other input is already programmed with priority '1', and revertive mode is on, this source will
be selected.
Bits (7:4) Unused
Bits (3:0)
0000
Automatic selection
0011
SEC1
0100
SEC2
0101
SEC1DIFF
0110
SEC2DIFF
1001
SEC3
1111
Automatic selection (default)
Other values should not be used.
XXXX1111
Revision 2.01/December 2005 Semtech Corp.
24
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