ACS8520 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8520' PDF : 150 Pages View PDF
ACS8520 SETS
ADVANCED COMMUNICATIONS
Address (hex): 32 (cont...)
Register Name cnfg_operating_mode
FINAL
DATASHEET
Description
(R/W) Register to force the state Default Value
of the TO DPLL controlling state
machine.
0000 0000
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T0_DPLL_operating_mode
Bit No.
Description
Bit Value Value Description
[2:0]
T0_DPLL_operating_mode
This field is used to control the state of the internal
finite state machine controlling the T0 DPLL. A value
of zero is used to allow the finite state machine to
control itself. Any other value will force the state
machine to jump into that state. Care should be
taken when forcing the state machine. Whilst it is
forced, the internal monitoring functions cannot
affect the internal state machine, therefore, the
user is responsible for all monitoring and control
functions required to achieve the desired
functionality.
000
Automatic (internal state machine controlled).
001
Free Run.
010
Holdover.
011
Not used.
100
Locked.
101
Pre-locked2.
110
Pre-locked.
111
Phase Lost.
Address (hex): 33
Register Name force_select_reference_source
Description
(R/W) Register used to force the Default Value
selection of a particular reference
source for the T0 DPLL.
0000 1111
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
forced_reference_source
Bit 0
Bit No.
Description
Bit Value Value Description
[7:4]
[3:0]
Not used.
forced_reference_source
Value representing the source to be selected by the
T0 DPLL. Value of 0 hex will leave the selection to
the automatic control mechanism within the device.
Using this mechanism will bypass all the monitoring
functions assuming the selected input to be valid. If
the device is not in state “Locked” then it will
progress to state locked in the usual manner. If the
input fails, the device will not change state to
Holdover, as it is not allowed to disqualify the
source. The effect of this register is simply to raise
the priority of the selected input to “1” (highest). To
ensure selection of the programmed input
reference under all circumstances, revertive mode
should be enabled (Reg. 34 bit 0 set to “1”).
-
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
-
Automatic state machine source selection
T0 DPLL forced to select input I1.
T0 DPLL forced to select input I2.
T0 DPLL forced to select input I3.
T0 DPLL forced to select input I4.
T0 DPLL forced to select input I5.
T0 DPLL forced to select input I6.
T0 DPLL forced to select input I7.
T0 DPLL forced to select input I8.
T0 DPLL forced to select input I9.
T0 DPLL forced to select input I10.
T0 DPLL forced to select input I11.
T0 DPLL forced to select input I12.
T0 DPLL forced to select input I13.
T0 DPLL forced to select input I14.
Not used.
Revision 3.02/October 2005 © Semtech Corp.
Page 82
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