ACS8520 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8520' PDF : 150 Pages View PDF
ACS8520 SETS
ADVANCED COMMUNICATIONS
Address (hex): 3B
Register Name cnfg_auto_bw_sel
FINAL
DATASHEET
Description
(R/W) Register to select
Default Value
automatic BW selection for the T0
DPLL path
1111 1011
Bit 7
auto_BW_sel
Bit 6
Bit 5
Bit 4
Bit 3
T0_lim_int
Bit 2
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
7
[6:4]
3
[2:0]
auto_BW_sel
Bit to select locked bandwidth (Reg. 67) or
acquisition bandwidth (Reg. 69) for the T0 DPLL
Not used.
T0_lim_int
When set to 1 the integral path value of the DPLL is
limited or frozen when the DPLL reaches either min
or max frequency. This can be used to minimize
subsequent overshoot when the DPLL is pulling in.
Note that when this happens, the reported
frequency value via current_DPLL_freq (Reg. 0C, 0D
and 07) is also frozen.
Not used.
1
Automatically selects either locked or acquisition
bandwidth as appropriate
0
Always selects locked bandwidth
-
-
1
DPLL value frozen
0
DPLL not frozen
-
-
Address (hex): 3C
Register Name cnfg_nominal_frequency
[7:0]
Description
(R/W) Bits [7:0] of the register
used to calibrate the crystal
oscillator used to clock the
device.
Default Value 1001 1001
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
cnfg_nominal_frequency_value[7:0]
Bit 2
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
[7:0]
cnfg_nominal_frequency_value[7:0]
-
See register description of Reg. 3D
(cnfg_nominal_frequency_value[15:8]).
Revision 3.02/October 2005 © Semtech Corp.
Page 88
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