AD9851–Typical Performance Characteristics
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0Hz
START
RBW = 5kHz
VBW = 5kHz
SWT = 7.2s
RF ATT = 20dB
REF LVL = –7dBm
2AP
7.2MHz/
72MHz
STOP
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
1.1MHz
CENTER
RBW = 300Hz
VBW = 300Hz
SWT = 11.5s
RF ATT = 20dB
REF LVL = –7dBm
2AP
20kHz/
200kHz
SPAN
TPC 1. Wideband (dc to 72 MHz) output SFDR for
a 1.1 MHz fundamental output signal. System
clock = 180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0Hz
START
RBW = 5kHz
VBW = 5kHz
SWT = 7.2s
RF ATT = 20dB
REF LVL = –7dBm
2AP
7.2MHz/
72MHz
STOP
TPC 4. Narrowband (1.1 ± 0.1 MHz) output SFDR
for a 1.1 MHz fundamental output signal. System
clock =180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
0
RBW = 300Hz
–10
VBW = 300Hz
SWT = 11.5s
–20
RF ATT = 20dB
REF LVL = –7dBm
–30
–40
2AP
–50
–60
–70
–80
–90
–100
40.1MHz
CENTER
20kHz/
200kHz
SPAN
TPC 2. Wideband (dc to 72 MHz) output SFDR for
a 40.1 MHz fundamental output signal. System
clock = 180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
0
RBW = 5kHz
–10 VBW = 5kHz
SWT = 7.2s
–20 RF ATT = 20dB
REF LVL = –7dBm
–30
–40
–50
–60
–70
–80
–90
–100
0Hz
START
7.2MHz/
2AP
72MHz
STOP
TPC 5. Narrowband (40.1 ± 0.1 MHz) output SFDR
for a 40.1 MHz fundamental output signal. System
clock = 180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
0
RBW = 300Hz
–10
VBW = 300Hz
SWT = 11.5s
–20
RF ATT = 20dB
REF LVL = –7dBm
–30
–40
2AP
–50
–60
–70
–80
–90
–100
70.1MHz
CENTER
20kHz/
200kHz
SPAN
TPC 3. Wideband (dc to 72 MHz) output SFDR for
a 70.1 MHz fundamental output signal. System
clock = 180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
–6–
TPC 6. Narrowband (70.1 ± 0.1 MHz) output SFDR
for a 70.1 MHz fundamental output signal. System
clock = 180 MHz (6 REFCLK multiplier engaged),
VS = 5 V.
REV. D