70
1.1MHz
65
60
40.1MHz
55
50
70.1MHz
45
40
5
10
15
20
MAXIMUM DAC IOUT – mA
TPC 17. Effect of DAC maximum output current on
wideband (0 to 72 MHz) SFDR at three representa-
tive DAC output frequencies: 1.1 MHz, 40.1 MHz,
and 70.1 MHz. VS = 5 V, 180 MHz system clock (6
REFCLK multiplier disabled). Currents are set using
appropriate values of RSET.
AD9851
600
500
400
VS = +3.3V
300
VS = +5V
200
100
0
0
20
40
60
80 100 120 140 160
INPUT FREQUENCY – MHz
TPC 18. Minimum p-p input signal needed to tog-
gle the AD9851 comparator output. Comparator
input is a sine wave compared with a fixed volt-
age threshold. Use this data in addition to sin(x)/x
rolloff and any filter losses to determine whether
adequate signal is being presented to the AD9851
comparator.
REV. D
–9–