ADSP-21367/ADSP-21368/ADSP-21369
Core Timer
The following timing specification applies to FLAG3 when it is
configured as the core timer (CTIMER).
Table 17. Core Timer
Parameter
Switching Characteristic
tWCTIM
CTIMER Pulse Width
Min
4 × tPCLK – 1
Max
Unit
ns
FLAG3
(CTIMER)
tW CT IM
Figure 10. Core Timer
Timer PWM_OUT Cycle Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in PWM_OUT (pulse-width modulation) mode.
Timer signals are routed to the DPI_P14–1 pins through the
DPI SRU. Therefore, the timing specifications provided below
are valid at the DPI_P14–1 pins.
Table 18. Timer PWM_OUT Timing
Parameter
Switching Characteristic
tPWMO
Timer Pulse Width Output
Min
2 × tPCLK – 1.2
Max
2 × (231 – 1) × tPCLK
Unit
ns
DPI_P14-1
(TIMER2-0)
tPWMO
Figure 11. Timer PWM_OUT Timing
Rev. C | Page 22 of 56 | January 2008