ADSP-21367/ADSP-21368/ADSP-21369
Timer WDTH_CAP Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in WDTH_CAP (pulse width count and capture)
mode. Timer signals are routed to the DPI_P14–1 pins through
the DPI SRU. Therefore, the timing specification provided
below are valid at the DPI_P14–1 pins.
Table 19. Timer Width Capture Timing
Parameter
Switching Characteristic
tPWI
Timer Pulse Width
Min
2 × tPCLK
Max
2 × (231 – 1) × tPCLK
Unit
ns
tPWI
DPI_P14-1
(TIMER2-0)
Figure 12. Timer Width Capture Timing
Pin to Pin Direct Routing (DAI and DPI)
For direct pin connections only (for example, DAI_PB01_I to
DAI_PB02_O).
Table 20. DAI Pin to Pin Routing
Parameter
Timing Requirement
tDPIO
Delay DAI Pin Input Valid to DAI Output Valid
Min
Max
Unit
1.5
12
ns
DAI_Pn
DPI_Pn
DAI_Pm
DPI_Pm
tDPIO
Figure 13. DAI Pin to Pin Direct Routing
Rev. C | Page 23 of 56 | January 2008