ADSP-21469 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21469' PDF : 56 Pages View PDF
ADSP-21467/ADSP-21469
Reset
Table 20. Reset
Parameter
Min
Max
Unit
Timing Requirements
tWRST1
RESET Pulse Width Low
4 × tCK
ns
tSRST
RESET Setup Before CLKIN Low
8
ns
1 Applies after the power-up sequence is complete. At power-up, the processor’s internal phase-locked loop requires no more than 100 μs while RESET is low, assuming stable
VDD and CLKIN (not including start-up time of external clock oscillator).
CLKIN
tWRST
RESET
Figure 9. Reset
Running Reset
The following timing specification applies to
RESETOUT/RUNRSTIN pin when it is configured as
RUNRSTIN.
Table 21. Running Reset
Parameter
Timing Requirements
tWRUNRST
tSRUNRST
Running RESET Pulse Width Low
Running RESET Setup Before CLKIN High
Min
4 × tCK
8
CLKIN
RUNRSTIN
tWRUNRST
tSRUNRST
Figure 10. Running Reset
tSRST
Max
Unit
ns
ns
Rev. B | Page 27 of 76 | March 2013
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