ADSP-BF534 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF534' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
Asynchronous Memory Write Cycle Timing
Table 19. Asynchronous Memory Write Cycle Timing
Parameter
Timing Requirements
tSARDY
ARDY Setup Before CLKOUT
tHARDY
ARDY Hold After CLKOUT
Switching Characteristics
tDDAT
tENDAT
tDO
tHO
DATA15–0 Disable After CLKOUT
DATA15–0 Enable After CLKOUT
Output Delay After CLKOUT1
Output Hold After CLKOUT 1
1 Output pins include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, AWE.
Min
Max
Unit
4.0
ns
0.0
ns
6.0
ns
1.0
ns
6.0
ns
0.8
ns
SETUP
2 CYCLES
ACCESS
PROGRAMMED WRITE EXTENDED HOLD
ACCESS 2 CYCLES
1 CYCLE 1 CYCLE
CLKOUT
t DO
t HO
AMSx
ABE1–0
ADDR19–1
AWE
ARDY
DATA15–0
BE, ADDRESS
tDO
tSARDY
tHO
tHARDY
t ENDAT
WRITE DATA
tSARDY
tDDAT
Figure 11. Asynchronous Memory Write Cycle Timing
Rev. B | Page 29 of 68 | July 2006
Share Link: 
