ADSP-BF534/ADSP-BF536/ADSP-BF537
ERxCLK
tREFCLKW
tR EF CL K
ERxD1-0
ERxDV
ERxER
tERXCLKIS
tERXCLKIH
Figure 31. 10/100 Ethernet MAC Controller Timing: RMII Receive Signal
RMII REF_CLK
ETxD1-0
ETxEN
tREFC LK
tEREFCLKOH
tEREFCLKOV
Figure 32. 10/100 Ethernet MAC Controller Timing: RMII Transmit Signal
MII CRS, COL
tECRSH
tECOLH
tECRSL
tECOLL
Figure 33. 10/100 Ethernet MAC Controller Timing: Asynchronous Signal
MDC (OUTPUT)
MDIO (OUTPUT)
MDIO (INPUT)
tMDCOH
tMDCOV
tMDIOS tMDCIH
Figure 34. 10/100 Ethernet MAC Controller Timing: MII Station Management
Rev. B | Page 49 of 68 | July 2006