APW7068 View Datasheet(PDF) - Anpec Electronics
Part Name
Description
MFG CO.
APW7068
Anpec Electronics
'APW7068' PDF : 26 Pages View PDF
APW7068
Function Descriptions
Over-Current Protection (Cont.)
The threshold of the over current limit is therefore
given by:
voltage is over 135% of the reference voltage, the
controller will make Low-Side gate signal fully turn on
until the fault events are removed.
I = LIMIT
I × R OCSET
OCSET
R (L DS(ON) OW − Side)
For the over-current is never occurred in the normal
operating load range; the variation of all parameters in
the above equation should be determined.
·The MOSFET’s RDS(ON) is varied by temperature and
gate to source voltage, the user should determine the
maximum RDS(ON) in manufacturer’s datasheet.
·The minimum IOCSET (36uA) and minimum ROCSET
should be used in the above equation.
·Note that the ILIMIT is the current flow through the
lower MOSFET; ILIMIT must be greater than maximum
output current add the half of inductor ripple current.
Over Voltage Protection
The FB pin is monitored during converter operation
by its own Over Voltage(OV) comparator. If the FB
Under Voltage Protection
The FBL pin is monitored during converter opera-
tion by its own Under Voltage(UV) comparator. If
the FBL voltage drop below 50% of the reference
voltage (50% of 0.8V = 0.4V), a fault signal is inter-
nally generated, and the device turns off both high-
side and low-side MOSFET and the converter’s out-
put is latched to be floating. The controller will shut-
down the IC directly.
Shutdown and Enable
Pulling the FS_DIS voltage to GND by an open drain
transistor, shown in typical application circuit,
shutdown the APW7068 PWM controller. In shutdown
mode, the UGATE and LGATE turn off and pull to
PHASE and GND respectively.
Application Information
Output Voltage Selection
The output voltage of PWM converter can be programmed
with a resistive divider. Use 1% or better resistors for
the resistive divider is recommended. The FB pin is
the inverter input of the error amplifier, and the reference
voltage is 0.8V. The output voltage is determined by:
VOUT1
=
0.8 × 1+
R1
R GND1
Where R1 is the resistor connected from VOUT1 to FB
and R is the resistor connected from FB to GND.
GND1
The linear regulator output voltage V is also set by
OUT2
means of an external resistor divider. The FBL pin is
the inverter input of the error amplifier, and the reference
voltage is 0.8V. The output voltage is determined by:
VOUT2
=
0.8
×
1 +
R4
R GND2
Where R4 is the resistor connected from V to
OUT2
FBL and R is the resistor connected from FBL to
GND2
GND.
Copyright © ANPEC Electronics Corp.
14
Rev. A.2 - Jun., 2006
www.anpec.com.tw
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