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APW7068 View Datasheet(PDF) - Anpec Electronics

Part Name
Description
MFG CO.
'APW7068' PDF : 26 Pages View PDF
APW7068
Application Information (Cont.)
Layout Considerations (Cont.)
the upper MOSFET; the output capacitor should be
erates a large voltage spike during the switching near the loads. The input capacitor GND should
interval. In general, using short, wide printed circuit be close to the output capacitor GND and the lower
traces should minimize interconnecting imped- MOSFET GND.
ances and the magnitude of voltage spike. And signal
and power grounds are to be kept separate till com-
bined using ground plane construction or single point
- The drain of the MOSFETs (VIN1 and PHASE nodes)
should be a large plane for heat sinking.
grounding. Figure 11. illustrates the layout, with bold
lines indicating high current paths; these traces must
APW7068
VIN1
be short and wide. Components along the bold lines
should be placed lose together. Below is a checklist
VIN2
for your layout:
VCC12
BOOT
- The metal plate of the bottom of the packages
VOUT2
(QFN-16) must be soldered to the PCB and con-
L
O
nected to the GND plane on the backside through
A
D
several thermal vias.
DRIVE UGATE
FBL PHASE
LGATE
REF_OUT
L
O
A
D
VOUT1
- Keep the switching nodes (UGATE, LGATE and
PHASE) away from sensitive small signal nodes
since these nodes are fast moving signals.
Therefore, keep traces to these nodes as short as
possible.
Figure 11. Layout Guidelines
- The traces from the gate drivers to the MOSFETs
(UG, LG, DRIVE) should be short and wide.
- Place the source of the high-side MOSFET and
the drain of the low-side MOSFET as close as
possible. Minimizing the impedance with wide
layout plane between the two pads reduces the
voltage bounce of the node.
- Decoupling capacitor, compensation component,
the resistor dividers, boot capacitors, and
REF_OUT capacitors should be close their pins.
(For example, place the decoupling ceramic
capacitor near the drain of the high-side MOSFET
as close as possible. The bulk capacitors are also
placed near the drain).
- The input capacitor should be near the drain of
Copyright © ANPEC Electronics Corp.
19
Rev. A.2 - Jun., 2006
www.anpec.com.tw
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