APW7068 View Datasheet(PDF) - Anpec Electronics
Part Name
Description
MFG CO.
APW7068
Anpec Electronics
'APW7068' PDF : 26 Pages View PDF
APW7068
Application Information (Cont.)
Output Capacitor Selection (Cont.)
by the manufactures. If in doubt, consult the capacitors
manufacturer.
Input Capacitor Selection
The input capacitor is chosen based on the voltage
rating and the RMS current rating. For reliable
operation, select the capacitor voltage rating to be at
least 1.3 times higher than the maximum input voltage.
The maximum RMS current rating requirement is
approximately IOUT1/2, where IOUT1 is the load current.
During power up, the input capacitors have to handle
large amount of surge current. If tantalum capacitors
are used, make sure they are surge tested by the
manufactures. If in doubt, consult the capacitors
manufacturer. For high frequency decoupling, a ceramic
capacitor 1uF can be connected between the drain of
upper MOSFET and the source of lower MOSFET.
applications, multiple capacitors have to be parallel to
achieve the desired ESR value. A small decoupling
capacitor in parallel for bypassing the noise is also
recommended, and the voltage rating of the output
capacitors also must be considered. If tantalum
capacitors are used, make sure they are surge tested
by the manufactures. If in doubt, consult the capacitors
manufacturer.
Input Capacitor Selection
The input capacitor is chosen based on the voltage
rating and the RMS current rating. For reliable
operation, select the capacitor voltage rating to be at
least 1.3 times higher than the maximum input voltage.
The maximum RMS current rating requirement is
approximately IOUT1/2, where IOUT1 is the load current.
During power up, the input capacitors have to handle
large amount of surge current. If tantalum capacitors
are used, make sure they are surge tested by the
manufactures. If in doubt, consult the capacitors
manufacturer. For high frequency decoupling, a ceramic
capacitor 1uF can be connected between the drain of
upper MOSFET and the source of lower MOSFET.
MOSFET Selection
The selection of the N-channel power MOSFETs are
determined by the RDS(ON), reverse transfer capacitance
(C ) and maximum output current requirement. There
RSS
are two components of loss in the MOSFETs:
conduction loss and transition loss. For the upper
and lower MOSFET, the losses are approximately
given by the following:
P = I (1+ TC)(R )D + (0.5)( I )(V )( t )F
UPPER OUT1
DS(ON)
OUT1 IN1 SW S
PLOWER = IOUT1 (1+ TC)(RDS(ON))(1-D)
Where IOUT1 is the load current
TC is the temperature dependency of RDS(ON)
FS is the switching frequency
tSW is the switching interval
D is the duty cycle
Note that both MOSFETs have conduction loss while
the upper MOSFET include an additional transition
loss. The switching internal, t , is a function of the
SW
reverse transfer capacitance C . The (1+TC) term is
RSS
to factor in the temperature dependency of the R
DS(ON)
and can be extracted from the “RDS(ON) vs Temperature”
curve of the power MOSFET.
Layout Considerations
In any high switching frequency converter, a correct
layout is important to ensure proper operation of the
regulator. With power devices switching at 300KHz or
above, the resulting current transient will cause volt-
age spike across the interconnecting impedance and
parasitic circuit elements. As an example, consider
the turn-off transition of the PWM MOSFET. Before
turn-off, the MOSFET is carrying the full load current.
During turn-off, current stops flowing in the MOSFET
and is free-wheeling by the lower MOSFET and para-
sitic diode. Any parasitic inductance of the circuit gen-
Copyright © ANPEC Electronics Corp.
18
Rev. A.2 - Jun., 2006
www.anpec.com.tw
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