AT90PWM81 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT90PWM81' PDF : 325 Pages View PDF
AT90PWM81/161
Here is a “light” C-code that describes such a sequence of commands.
C code example
void ClockSwiching (unsigned char clk-number, unsigned char sut) {
#define CLOCK-RECOVER
#define CLOCK-ENABLE
#define CLOCK-SWITCH
#define CLOCK-DISABLE
0x05
0x02
0x04
0x01
unsigned char previous-clk, temp;
// Disable interrupts
asm ("cli"); temp = SREG;
// “Recover System Clock Source” command
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK-RECOVER;
previous-clk = CLKSELR & 0x0F;
// “Enable Clock Source” command
CLKSELR = ((sut << 4 ) & 0x30) | (clk-number & 0x0F);
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK-ENABLE;
// Wait for clock availability
while ((CLKCSR & (1 << CLKRDY)) == 0);
// “Clock Source Switching” command
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK-SWITCH;
// Wait for effective switching
while (1){
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK-RECOVER;
if ((CLKSELR & 0x0F) == (clk-number & 0x0F)) break;
}
// “Disable Clock Source” command
CLKSELR = previous-clk;
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK-DISABLE;
// Re-enable interrupts
SREG = temp; asm ("sei");
}
Warning:
In the AT90PWM81/161, only one among the external clock sources can be enabled at a given
time and it is not possible to switch from external clock to external oscillator as both sources
share one pin.
Also, it is not possible to switch the synchronization source of the PLL when the sytem clock is
PLL/4. See Table 5-1 on page 28 to identify these cases.
As they are two CSEL adresses to access the Calibrated internal RC oscillator 8.0MHz/1.0MHz,
the change between the two frequencies is not allowed by the clock switching features. The
CKRC81 bit in MCUCR register must be used for this purpose.
38
7734Q–AVR–02/12
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