AT91M40400 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91M40400' PDF : 116 Pages View PDF
AT91M40400
WD Overflow Mode Register
Name:
Access:
Reset Value:
WD_OMR
Read/Write
0
31
30
29
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23
22
21
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15
14
13
7
6
5
OKEY
28
27
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20
19
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12
11
OKEY
4
3
EXTEN
26
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18
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10
2
IRQEN
• WDEN: Watch Dog Enable
0 = Watch Dog is disabled and does not generate any signals.
1 = Watch Dog is enabled and generates enabled signals.
• RSTEN: Reset Enable
0 = Generation of an internal reset by the Watch Dog is disabled.
1 = When overflow occurs, the Watch Dog generates an internal reset.
• IRQEN: Interrupt Enable
0 = Generation of an interrupt by the Watch Dog is disabled.
1 = When overflow occurs, the Watch Dog generates an interrupt.
• EXTEN: External Signal Enable
0 = Generation of a pulse on the pin NWDOVF by the Watch Dog is disabled.
1 = When an overflow occurs, a pulse on the pin NWDOVF is generated.
• OKEY: Overflow Access Key
Used only when writing WD_OMR. OKEY is read as 0.
0x234 = Write access in WD_OMR is allowed.
Other value = Write access in WD_OMR is prohibited.
25
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17
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9
1
RSTEN
24
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16
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8
0
WDEN
107
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