5.2 Overview
The Atmel® ATA6612C/ATA6613C uses a low-power CMOS 8-bit microcontroller based on the Atmel AVR® enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the Atmel ATA6612C/ATA6613C achieves
throughputs approaching 1MIPS per MHz allowing the system designer to optimize power consumption versus processing
speed.
5.2.1 Block Diagram
Figure 5-1. Block Diagram
GND VCC
Watchdog
Timer
Watchdog
Oscillator
Oscillator
Circuits/
Clock
Generation
EEPROM
Power
Supervision
POR/BOD
and
RESET
debugWIRE
Program
Logic
Flash
SRAM
AVR CPU
8-bit T/C 0
8-bit T/C 2
16-bit T/C 1
Analog
Compensation
A/D
2
Converter
Internal
6
Bandgap
AVCC
AREF
GND
USART 0
SPI
TWI
PORT D (8)
PD[0..7]
PORT B (8)
PB[0..7]
PORT C (7)
RESET
XTAL[1..2]
PC[0..6] ADC[6..7]
28 ATA6612C/ATA6613C [DATASHEET]
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