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ATA6612C View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
'ATA6612C' PDF : 312 Pages View PDF
5.2.4.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The port B output buffers have
symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled
low will source current if the pull-up resistors are activated. The port B pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the inverting oscillator amplifier.
Depending on the clock selection fuse settings, PB7 can be used as input to the inverting oscillator amplifier.
If the internal calibrated RC oscillator is used as chip clock source, PB7..6 is used as TOSC2..1 input for the asynchronous
Timer/Counter2 if the AS2 bit in ASSR is set.
The various special features of port B are elaborated in Section 5.10.3.2 “Alternate Functions of Port B” on page 84 and
Section 5.6 “System Clock and Clock Options” on page 46.
5.2.4.4 Port C (PC5:0)
Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PC5..0 output buffers have
symmetrical drive characteristics with both high sink and source capability. As inputs, port C pins that are externally pulled
low will source current if the pull-up resistors are activated. The port C pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
5.2.4.5 PC6/RESET
If the RSTDISBL fuse is unprogrammed, PC6 is used as a reset input. A low level on this pin for longer than the minimum
pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in
Table 5-3 on page 43. Shorter pulses are not guaranteed to generate a reset.
The various special features of port C are elaborated in Section 5.10.3.3 “Alternate Functions of Port C” on page 87.
5.2.4.6 Port D (PD7:0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have
symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled
low will source current if the pull-up resistors are activated. The port D pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
The various special features of Port D are elaborated in Section 5.10.3.4 “Alternate Functions of Port D” on page 89.
5.2.4.7 AVCC
AVCC is the supply voltage pin for the A/D converter, PC3:0, and ADC7:6. I should be externally connected to VCC, even if the
ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. Note that PC6..4 use digital
supply voltage, VCC.
5.2.4.8 AREF
AREF is the analog reference pin for the A/D converter.
5.2.4.9 ADC7:6 (TQFP and QFN Package Only)
In the TQFP and QFN package, ADC7:6 serve as analog inputs to the A/D converter. These pins are powered from the
analog supply and serve as 10-bit ADC channels.
30 ATA6612C/ATA6613C [DATASHEET]
9111L–AUTO–11/14
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