The Atmel® AVR® core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are
directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in one single
instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
The Atmel ATA6612C/ATA6613C provides the following features: 8K/16K bytes of in-system programmable flash with
read-while-write capabilities, 512 bytes EEPROM, 1Kbyte SRAM, 23 general purpose I/O lines, 32 general purpose working
registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable
USART, a byte-oriented 2-wire serial interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and QFN
packages), a programmable watchdog timer with internal oscillator, and five software selectable power saving modes. The
idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire serial interface, SPI port, and interrupt
system to continue functioning. The power-down mode saves the register contents but freezes the oscillator, disabling all
other chip functions until the next interrupt or hardware reset. In power-save mode, the asynchronous timer continues to run,
allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC noise reduction mode stops the
CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In
standby mode, the crystal/resonator oscillator is running while the rest of the device is sleeping. This allows very fast start-up
combined with low power consumption.
The device is manufactured using Atmel’s high density non-volatile memory technology. The on-chip ISP flash allows the
program memory to be reprogrammed in-system through an SPI serial interface, by a conventional non-volatile memory
programmer, or by an on-chip boot program running on the Atmel AVR core. The boot program can use any interface to
download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run
while the application flash section is updated, providing true read-while-write operation. By combining an 8-bit RISC CPU
with in-system self-programmable flash on a monolithic chip, the Atmel ATA6612C/ATA6613C uses a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.
The Atmel ATA6612C/ATA6613C Atmel AVR is supported with a full suite of program and system development tools
including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulator, and evaluation kits.
5.2.2
Automotive Quality Grade
The Atmel ATA6612C and Atmel ATA6613C have been developed and manufactured according to the most stringent
requirements of the international standard ISO-TS-16949 grade 1. This data sheet contains limit values extracted from the
results of extensive characterization (temperature and voltage). The quality and reliability of the ATA6612C and ATA6613C
have been verified during regular product qualification as per AEC-Q100.
5.2.3
Comparison Between Atmel ATA6612C/ATA6613C
The Atmel ATA6612C and ATA6613C differ only in memory sizes, boot loader support, and interrupt vector sizes.
Table 5-1 summarizes the different memory and interrupt vector sizes for the two devices.
Table 5-1. Memory Size Summary
Device
ATA6612C
ATA6613C
Flash
8Kbytes
16Kbytes
EEPROM
512Bytes
512Bytes
RAM
1Kbyte
1Kbyte
Interrupt Vector Size
1 instruction word/vector
2 instruction words/vector
Atmel ATA6612C and ATA6613C support a real read-while-write self-programming mechanism. There is a separate boot
loader section, and the SPM instruction can only execute from there.
5.2.4 Pin Descriptions
5.2.4.1 VCC
Digital supply voltage.
5.2.4.2 GND
Ground.
ATA6612C/ATA6613C [DATASHEET]
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