ATMEGA161-8PC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
ATMEGA161-8PC
Atmel Corporation
'ATMEGA161-8PC' PDF : 159 Pages View PDF
Sleep Modes
To enter any of the three sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruction must be executed.
The SM1 bit in the MCUCR register and SM0 bit in the EMCUCR register select which sleep mode (Idle, Power-down, or
Power Save) will be activated by the SLEEP instruction, see Table 6. If an enabled interrupt occurs while the MCU is in a
sleep mode, the MCU awakes. The CPU is then halted for 4 cycles, it executes the interrupt routine, and resumes execu-
tion from the instruction following SLEEP. The contents of the register file, SRAM, and I/O memory are unaltered. If a reset
occurs during sleep mode, the MCU wakes up and executes from the Reset vector
Idle Mode
When the SM1/SM0 bits are set to 00, the SLEEP instruction makes the MCU enter the Idle Mode, stopping the CPU but
allowing SPI, UARTs, Analog Comparator, Timer/Counters, Watchdog and the interrupt system to continue operating. This
enables the MCU to wake-up from external triggered interrupts as well as internal ones like the Timer Overflow and UART
Receive Complete interrupts. If wake-up from the Analog Comparator interrupt is not required, the Analog Comparator can
be powered down by setting the ACD-bit in the Analog Comparator Control and Status register – ACSR. This will reduce
power consumption in Idle Mode.
Power-down Mode
When the SM1/SM0 bits are set to 10, the SLEEP instruction makes the MCU enter the Power-down Mode. In this mode,
the external oscillator is stopped, while the external interrupts and the Watchdog (if enabled) continue operating. Only an
external reset, a watchdog reset (if enabled), an external level interrupt on INT0 or INT1, or an external edge interrupt on
INT2 can wake-up the MCU.
If INT2 is used for wake-up from power-down mode, the edge is remembered until the MCU wakes up.
If a level triggered interrupt is used for wake-up from power-down mode, the changed level must be held for some time to
wake-up the MCU. This makes the MCU less sensitive to noise. The changed level is sampled twice by the watchdog oscil-
lator clock, and if the input has the required level during this time, the MCU will wake-up. The period of the watchdog
oscillator is 1 µs (nominal) at 5.0V and 25C. The frequency of the watchdog oscillator is voltage dependent as shown in the
Electrical Characteristics section.
When waking up from Power-down Mode, there is a delay from the wake-up condition occurs until the wake-up becomes
effective. This allows the clock to restart and become stable after having been stopped. The wake-up period is defined by
the same CKSEL fuses that define the reset time-out period. The wake-up period is equal to the clock counting part of the
reset period, as shown in Table 4. If the wake-up condition disappears before the MCU wakes up and starts to execute,
e.g. a low level on INT0 is not held long enough, the interrupt causing the wake-up will not be executed.
Power Save Mode
When the SM1/SM0 bits are 11, the SLEEP instruction makes the MCU enter the Power Save Mode. This mode is identical
to Power-down, with one exception:
If Timer/Counter2 is clocked asynchronously, i.e. the AS2 bit in ASSR is set, Timer/Counter2 will run during sleep. In addi-
tion to the Power-down wake-up sources, the device can also wake-up from either Timer Overflow or Output Compare
event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable bits are set in TIMSK and the global inter-
rupt enable bit in SREG is set.
Timer/Counters
The ATmega161 provides three general purpose Timer/Counters – two 8-bit T/Cs and one 16-bit T/C. Timer/Counter2 can
optionally be asynchronously clocked from an external oscillator. This oscillator is optimized for use with a 32.768 kHz
watch crystal, enabling use of Timer/Counter2 as a Real Time Clock (RTC). Timer/Counters 0 and 1 have individual pres-
caling selection from the same 10-bit prescaling timer. Timer/Counter2 has its own prescaler. Both these prescalers can be
reset by setting the corresponding control bits in the Special Functions IO Register (SFIOR). Refer to page 36 for a detailed
description. These Timer/Counters can either be used as a timer with an internal clock time-base or as a counter with an
external pin connection which triggers the counting.
34
ATmega161(L)
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