ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATSAMA5D41A-CU' PDF : 1808 Pages View PDF
with Windows 98 SE. The CDC document, available at www.usb.org, describes how to implement devices such as
ISDN modems and virtual COM ports.
The Vendor ID is the Atmel’s vendor ID 0x03EB. The product ID is 0x6124. These references are used by the host
operating system to mount the correct driver. On Windows systems, INF files contain the correspondence between
vendor ID and product ID.
12.5.3.3 Enumeration Process
The USB protocol is a master/slave protocol. The host starts the enumeration, sending requests to the device
through the control endpoint. The device handles standard requests as defined in the USB Specification.
Table 12-5. Handled Standard Requests
Request
GET_DESCRIPTOR
SET_ADDRESS
SET_CONFIGURATION
GET_CONFIGURATION
GET_STATUS
SET_FEATURE
CLEAR_FEATURE
Definition
Returns the current device configuration value
Sets the device address for all future device access
Sets the device configuration
Returns the current device configuration value
Returns status for the specified recipient
Used to set or enable a specific feature
Used to clear or disable a specific feature
The device also handles some class requests defined in the CDC class.
Table 12-6. Handled Class Requests
Request
Definition
SET_LINE_CODING
Configures DTE rate, stop bits, parity and number of character bits
GET_LINE_CODING
Requests current DTE rate, stop bits, parity and number of character bits
SET_CONTROL_LINE_STATE RS-232 signal used to indicate to the DCE device that the DTE device is now present
Unhandled requests are stalled.
12.5.3.4 Communication Endpoints
Endpoint 0 is used for the enumeration process.
Endpoint 1 (64-byte Bulk OUT) and endpoint 2 (64-byte Bulk IN) are used as communication endpoints.
SAM-BA Boot commands are sent by the host through Endpoint 1. If required, the message is split into several
data payloads by the host driver.
If the command requires a response, the host sends IN transactions to pick up the response.
12.6
Fuse Box Controller
SAMA5D4 embeds 512 fuse bits reserved for customer needs.
Setting the write-once FUSE bit in the SFR_SECURE register disables access to the Secure Fuse Controller
(SFC).
12.6.1 Fuse Bit Mapping
The read/write access to the fuse bits requires that the internal 12 MHz RC oscillator is enabled.
To avoid any malfunctioning, the user must not write the “DO NOT USE (DNU)” Fuse bits.
84 SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16
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