13.5 L2 Cache Controller (L2CC) User Interface
Table 13-2. Register Mapping
Offset
Register
0x000
Cache ID Register
0x004
Cache Type Register
0x100
Control Register
0x104
Auxiliary Control Register
0x108
Tag RAM Control Register
0x10C
Data RAM Control Register
0x110–0x1FC Reserved
0x200
Event Counter Control Register
0x204
Event Counter 1 Configuration Register
0x208
Event Counter 0 Configuration Register
0x20C
Event Counter 1 Value Register
0x210
Event Counter 0 Value Register
0x214
Interrupt Mask Register
0x218
Masked Interrupt Status Register
0x21C
Raw Interrupt Status Register
0x220
Interrupt Clear Register
0x224–0x72C Reserved
0x730
Cache Synchronization Register
0x734–0x76C Reserved
0x770
Invalidate Physical Address Line Register
0x774–0x778 Reserved
0x77C
Invalidate Way Register
0x780–0x7AF Reserved
0x7B0
Clean Physical Address Line Register
0x7B4
Reserved
0x7B8
Clean Index Register
0x7BC
Clean Way Register
0x7C0–0x7EC Reserved
0x7F0
Clean Invalidate Physical Address Line Register
0x7F4
Reserved
0x7F8
Clean Invalidate Index Register
0x7FC
Clean Invalidate Way Register
0x800–0x8FC Reserved
0x900
Data Lockdown Register
0x904
Instruction Lockdown Register
Name
L2CC_IDR
L2CC_TYPR
L2CC_CR
L2CC_ACR
L2CC_TRCR
L2CC_DRCR
–
L2CC_ECR
L2CC_ECFGR1
L2CC_ECFGR0
L2CC_EVR1
L2CC_EVR0
L2CC_IMR
L2CC_MISR
L2CC_RISR
L2CC_ICR
–
L2CC_CSR
–
L2CC_IPALR
–
L2CC_IWR
–
L2CC_CPALR
–
L2CC_CIR
L2CC_CWR
–
L2CC_CIPALR
–
L2CC_CIIR
L2CC_CIWR
–
L2CC_DLKR
L2CC_ILKR
Access
Read-only
Read-only
Read/Write, Read-only(1)
Read/Write, Read-only(1)
Read/Write, Read-only(1)
Read/Write, Read-only(1)
–
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Programmable(2)
Read-only
Read-only
Programmable(2)
–
Read/Write
–
Read/Write
–
Read/Write
–
Read/Write
–
Read/Write
Read/Write
–
Read/Write
–
Read/Write
Read/Write
–
Programmable(2)
Programmable(2)
Reset
0x4100_00C9
0x0010_0100
0x0000_0000
0x0202_0000
0x0000_0111
0x0000_0111
–
0x0000_0000
0x0202_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
–
0x0000_0000
–
0x0000_0000
–
0x0000_0000
–
0x0000_0000
–
0x0000_0000
0x0000_0000
–
0x0000_0000
–
0x0000_0000
0x0000_0000
–
0x0000_0000
0x0000_0000
88 SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16