AU80610006225AASLBXC View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'AU80610006225AASLBXC' PDF : 80 Pages View PDF
Electrical Specifications
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
These are pre-silicon estimates and are subject to change.
2.
VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as
a logical low value.
3.
VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as
a logical high value.
4.
VIH and VOH may experience excursions above VCCP.. However, input signal drivers must
comply with the signal quality specifications.
5.
This is the pull-down driver resistance. Refer to processor I/O Buffer Models for I/V
characteristics. Measured at 0.31 * VCCP. RON(min) = 0.4 * RTT, RON(typ) = 0.455 * RTT,
RON(max) = 0.51 * RTT. RTT typical value of 55 Ohm is used for RON typ/min/max
calculations.
6.
GTLREF should be generated from VCCP. with a 1% tolerance resistor divider. The VCCP.
referred to in these specifications is the instantaneous VCCP.
7.
RTT is the on-die termination resistance measured at VOL of the AGTL+ output driver.
Measured at 0.31 * VCCP. RTT is connected to VCCP on die. Refer to processor I/O Buffer
Models for I/V characteristics.
8.
Specified with on-die RON and RTT are turned off. Vin between 0 and VCCP.
9.
CPAD includes die capacitance only. No package parasitic are included.
10. On die termination resistance, measured at 0.33 * VCCP.
Table 4-33.Legacy CMOS Signal Group DC Specification
Symbol
Parameter
Min
Typ
VCCP
VIH
VIL
VOH
VOL
ILI
CPAD1
CPAD2
I/O Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage Current
Pad Capacitance
Pad Capacitance for CMOS
Input
1.00
0.7 * VCCP
-0.1
0.9 * VCCP
-0.1
-100
2.35
0.85
1.05
0
VCCP
2.5
1.0
Max
1.10
VCCP + 0.1
0.3 * VCCP
VCCP + 0.1
0.1 * VCCP
100
2.6
1.05
Units Notes1
V
V
2
V
2, 3
V
2, 4
V
2, 5
uA
6
pF
7
pF
8
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
These are pre-silicon estimates and are subject to change.
2.
The VCCP referred to in these specifications is the instantaneous VCCP.
3.
Refer to the processor I/O Buffer Models for I/V characteristics.
4.
Measured at Iout = -1.1mA.
5.
Measured at Iout = 1.1mA.
6.
For VIN between 0V and VCCP. Measured when driver is tri-stated.
7.
CPAD1 includes die capacitance only for DPRSTP#, DPSLP#, BSEL[2:0], VID[6:0]. No
package parasitic are included.
8.
CPAD2 includes die capacitance for all other CMOS input signals. No package parasitics are
included.
48
Datasheet
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