C8051F061 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F061' PDF : 328 Pages View PDF
C8051F060/1/2/3/4/5/6/7
5.3.3. Settling Time Requirements
The ADC requires a minimum tracking time before an accurate conversion can be performed. This tracking
time is determined by the ADC input resistance, the ADC sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 5.5 shows the equivalent ADC input circuits for
both Differential and Single-ended modes. Notice that the equivalent time constant for both input circuits is
the same. The required settling time for a given settling accuracy (SA) may be approximated by
Equation 5.1. An absolute minimum tracking time of 280 ns is required prior to the start of a conversion.
t
=
ln
S-2---An--
×
RTOTALCSAMPLE
Equation 5.1. ADC0 Settling Time Requirements
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
RTOTAL is the sum of the ADC input resistance and any external source resistance.
n is the ADC resolution in bits (16).
Differential Mode
Single-Ended Mode
AIN0
RAIN = 30 Ω
RCInput= RAIN * CSAMPLE
AIN1
RAIN = 30 Ω
CSAMPLE = 80pF
CSAMPLE = 80pF
AIN0
or
AIN1
RAIN = 30 Ω
RCInput= RAIN * CSAMPLE
CSAMPLE = 80pF
Figure 5.5. ADC0 and ADC1 Equivalent Input Circuits
56
Rev. 1.2
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