C8051F061 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F061' PDF : 328 Pages View PDF
C8051F060/1/2/3/4/5/6/7
Figure 5.6. AMX0SL: AMUX Configuration Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
DIFFSEL
-
-
-
-
-
-
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xBB
SFR Page: 0
Bit 7:
Bit 6:
Bit 5-0:
RESERVED. Write to 0b.
DIFFSEL: Fully Differential Conversion Mode Select Bit.
0: Operate In Single-Ended Mode.
1: Operate In Differential Mode.
RESERVED. Write to 000000b.
NOTE:
For single-ended mode, the ADC0 Data Word is stored in ADC0H and ADC0L, while the
ADC1 Data Word is stored in ADC1H and ADC1L.
In differential mode, the combined ADC Data Word is stored in ADC0H and ADC0L, and is a
2’s complement number. ADC1’s Data Word (single-ended) is also stored in ADC1H and
ADC1L.
Rev. 1.2
57
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