C8051F061 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F061' PDF : 328 Pages View PDF
C8051F060/1/2/3/4/5/6/7
Figure 5.8. ADC1CF: ADC1 Configuration Register
R/W
AD1SC3
Bit7
R/W
AD1SC2
Bit6
R/W
AD1SC1
Bit5
R/W
AD1SC0
Bit4
R/W
AD1SCAL
Bit3
R/W
AD1GCAL
Bit2
R/W
R/W
Reset Value
AD1LCAL AD1OCAL 11110000
Bit1
Bit0
SFR Address: 0xBC
SFR Page: 1
Bits 7-4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
AD1SC3-0: ADC1 SAR Conversion Clock Period Bits.
SAR Conversion clock is divided down from the system clock according to the AD1SC bits
(AD1SC3-0). The number of system clocks used for each SAR conversion clock is equal to
AD1SC + 1. (Note: the ADC1 SAR Conversion Clock should be less than or equal to
25 MHz). See Table 5.1 for conversion timing details.
AD1SCAL: System Calibration Enable.
0: Internal ground and reference voltage are used for offset and gain calibration.
1: External voltages can be used for offset and gain calibration.
AD1GCAL: Gain Calibration.
Read:
0: Gain Calibration is completed or not yet started.
1: Gain Calibration is in progress.
Write:
0: No Effect.
1: Initiates a gain calibration if ADC1 is idle.
AD1LCAL: Linearity Calibration
Read
0: Linearity Calibration is completed or not yet started
1: Linearity Calibration is in progress
Write
0: No Effect
1: Initiates a linearity calibration if ADC1 is idle
AD1OCAL: Offset Calibration.
Read:
0: Offset Calibration is completed or not yet started.
1: Offset Calibration is in progress.
Write:
0: No Effect.
1: Initiates an offset calibration if ADC1 is idle.
Rev. 1.2
59
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