C8051F901-GD View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F901-GD
Silicon Laboratories
'C8051F901-GD' PDF : 318 Pages View PDF
C8051F91x-C8051F90x
Table 4.9. SmaRTClock Characteristics
VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified; Using factory-calibrated settings.
Parameter
Conditions
Min
Typ
Max
Oscillator Frequency (LFO)
13.1
16.4
19.7
Note: Blue indicates a feature only available on ‘F912 and ‘F902 devices.
Units
kHz
Table 4.10. ADC0 Electrical Characteristics
VDD = 1.8 to 3.6V V, VREF = 1.65 V (REFSL[1:0] = 11), –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ Max
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
(Guaranteed Monotonic)
12-bit mode
10-bit mode
12-bit mode 2
10-bit mode
12-bit mode2
10-bit mode
12
10
—
±1
±1.5
—
±0.5
±1
—
±0.8
±1
—
±0.5
±1
Offset Error
Full Scale Error
12-bit mode
10-bit mode
12-bit mode3
10-bit mode
—
±<1
±2
—
±<1
±2
—
±1
±4
—
±1
±2.5
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale,
maximum sampling rate)
Signal-to-Noise Plus Distortion4
12-bit mode
10-bit mode
62
65
—
54
58
—
Signal-to-Distortion4
12-bit mode
10-bit mode
—
76
—
—
73
—
Spurious-Free Dynamic Range4
12-bit mode
10-bit mode
—
82
—
—
75
—
Conversion Rate
SAR Conversion Clock
Normal Mode
Low Power Mode
—
—
8.33
—
—
4.4
Units
bits
LSB
LSB
LSB
LSB
dB
dB
dB
MHz
Conversion Time in SAR Clocks
10-bit Mode
8-bit Mode
13
—
— clocks
11
—
—
Track/Hold Acquisition Time
Initial Acquisition
1.5
Subsequent Acquisitions (DC
1.1
input, burst mode)
—
—
us
Throughput Rate
12-bit mode
10-bit mode
—
—
75 ksps
—
—
300
Notes:
1. Blue indicates a feature only available on ‘F912 and ‘F902 devices.
2. INL and DNL specifications for 12-bit mode do not include the first or last four ADC codes.
3. The maximum code in 12-bit mode is 0xFFFC. The Full Scale Error is referenced from the maximum code.
4. Performance in 8-bit mode is similar to 10-bit mode.
54
Rev. 1.0
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