CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
10.2 General Mapping Register for Memory Mode
10.2.1 Gen Map 0–6 Start Address Low (Memory)
Register Name: Gen Map 0–6 Start Address Low (Memory)
I/O Index: 08h, 0Ch, 10h, 18h, 20h, 28h, 30h
Memory Offset: 808h, 80Ch, 810h, 818h, 820h, 828h, 830h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: socket
Register Compatibility Type: 365
Bit 2
Bit 1
Bit 0
Start Address 19:12 (Memory)
R/W:00000000
There are seven separate Gen Map Start Address Low registers, each with identical fields. These
registers are located at the following indexes:
Index
08h
0Ch
10h
18h
20h
28h
30h
Memory Offset
808h
80Ch
810h
818h
820h
828h
830h
Gen Map Start Address Low
Gen Map 5 Start Address Low
Gen Map 6 Start Address Low
Gen Map 0 Start Address Low
Gen Map 1 Start Address Low
Gen Map 2 Start Address Low
Gen Map 3 Start Address Low
Gen Map 4 Start Address Low
Default Operation
I/O Window 0
I/O Window 1
Memory Window 0
Memory Window 1
Memory Window 2
Memory Window 3
Memory Window 4
Bits 7:0 — Start Address 19:12 (Memory)
This register contains the least-significant byte of the address that specifies where the memory
space of the corresponding memory map begins. Memory accesses that are equal or above this
address and equal or below the corresponding Gen Map End Address are mapped into the I/O or
memory space of the corresponding PC Card depending on the appropriate bits of the PC Card
Space Control and Window Type Select registers.
The most-significant byte is located in the Gen Map 0–6 Start Address High register.
June 1998
ADVANCE DATA BOOK v0.3
GENERAL WINDOW MAPPING
REGISTERS
125
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