CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
10.2.2 Gen Map 0–6 Start Address High (Memory)
Register Name: Gen Map 0–6 Start Address High (Memory)
I/O Index: 09h, 0Dh, 11h, 19h, 21h, 29h, 31h
Memory Offset: 809h, 80Dh, 811h, 819h, 821h, 829h, 831h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Reserved
Compatibility
Bit
Scratchpad Bits
R/W:0
R/W:0
R/W:00
Register Per: socket
Register Compatibility Type: 365
Bit 2
Bit 1
Bit 0
Start Address 23:20
R/W:0000
There are seven separate Gen Map Start Address High registers, each with identical fields. These
registers are located at the following indexes:
Index
09h
0Dh
11h
19h
21h
29h
31h
Memory Offset
809h
80Dh
811h
819h
821h
829h
831h
Gen Map Start Address High
Gen Map 5 Start Address High
Gen Map 6 Start Address High
Gen Map 0 Start Address High
Gen Map 1 Start Address High
Gen Map 2 Start Address High
Gen Map 3 Start Address High
Gen Map 4 Start Address High
Default Operation
I/O Window 0
I/O Window 1
Memory Window 0
Memory Window 1
Memory Window 2
Memory Window 3
Memory Window 4
Bits 3:0 — Start Address 23:20
This field contains the most-significant four bits of the Memory Start Address.
Bits 5:4 — Scratchpad Bits
Bit 6 — Compatibility Bit
Bit 7 — Reserved
126
GENERAL WINDOW MAPPING REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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