Table 15-8. TRDY# and STOP# Delay
Symbol
Parameter
t1
TRDY# active delay from PCI_CLK
t2
TRDY# inactive delay from PCI_CLK
t3
TRDY# high before High-Z
t4
STOP# active delay from PCI_CLK
t5
STOP# inactive delay from PCI_CLK
t6
STOP# high before High-Z
CL-PD6833
PCI-to-CardBus Host Adapter
PCI_VCC = 3.3 V PCI_VCC = 5.0 V
MIN MAX MIN MAX
–
11
–
11
–
11
–
11
1
–
1
–
–
11
–
11
–
11
–
11
1
–
1
–
Units
ns
ns
PCI_CLK
ns
ns
PCI_CLK
PCI_CLK
FRAME#
t1
TRDY#
High-Z
t4
STOP#
High-Z
High-Z = high-impedance
t2
t3
High-Z
t5
t6
High-Z
Figure 15-2. TRDY# and STOP# Delay (PCI™ Bus)
188
ELECTRICAL SPECIFICATIONS
ADVANCE DATA BOOK v0.3
June 1998