CL-PD6833
PCI-to-CardBus Host Adapter
15.3.3 PC Card (PCMCIA) Bus Timing Calculations
Calculations for minimum PC Card (PCMCIA) cycle’s Setup, Command, and Recovery timings are made
by first calculating factors derived from the applicable timer set’s timing registers and then by applying the
factor to an equation relating it to the internal clock period.
The PC Card cycle timing factors, in terms of the number of internal clocks, are calculated as follows:
S = Nval + 1
Equation 15-1
C = Nval + 1
Equation 15-2
R = Nval + 1
Equation 15-3
Nval is the specific selected multiplier value from the timer set’s Setup, Command, and Recovery Timing
registers (see Chapter 12 for the description of these registers).
From this, a PC Card cycle’s Setup, Command, and Recovery time for the selected timer set are
calculated as follows:
Minimum Setup time = (S × Tcp) − 10 ns
Equation 15-4
Minimum Command time = (C × Tcp) − 10 ns
Equation 15-5
Minimum Recovery time = (R + 1) × Tcp − 10 ns
Equation 15-6
Tcp is the period of the internal clock.
If PCI_CLK is selected (Misc Control 2 register bit 0 is a ‘0’) and operates at 33 MHz, and the clock input
is not being divided (Misc Control 2 register bit 4 is a ‘0’), then:
Tcp = 30 ns
Equation 15-7
The timing diagrams that follow were derived for a CL-PD6833 using the PCI clock at 33 MHz. The
examples for the default values of the Timing registers for Timer Set 0 are as follows:
Timing Register Name
(Timer Set 0)
Setup Timing 0
Command Timing 0
Recovery Timing 0
I/O
Index
3Ah
3Bh
3Ch
Value
(Default)
00h
07h
04h
Resultant Nval
0
7
4
Thus the minimum times for the default values are as follows:
Minimum Setup time = (S × Tcp) − 10 ns = {[0 + 1] × 30 ns} − 10 ns = 20 ns
Equation 15-8
Minimum Command time = (C × Tcp) − 10 ns = {[7 + 1] × 30 ns} − 10 ns = 230 ns Equation 15-9
Minimum Recovery time = (R + 1) × Tcp − 10 ns = {[5 + 1] × 30 ns} − 10 ns = 170 ns Equation 15-10
192
ELECTRICAL SPECIFICATIONS
ADVANCE DATA BOOK v0.3
June 1998