CL-PD6833
PCI-to-CardBus Host Adapter
5.18
Socket Number
Register Name: Socket Number
Offset: 94h
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
Register Per: socket
Bit 25
Bit 24
Byte 3
Bit 23
Bit 22
Bit 21
Reserved
R:00000000
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Byte 2
Reserved
R:00000000
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Byte 1
Bit 7
Bit 6
Bit 5
Reserved
R:00000000
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 0
Reserved
Socket Number
R:00000
R/W:000 / 001
This is the socket number used for backward-compatible addressing in the I/O space.
Bits 2:0 — Socket Number
These bits define the socket number that is used for the I/O addressing mode of operation.
Sockets A and B must have the same address, and therefore bit 2 of this register must be the same
for each configuration space.
Bit 2
0
0
0
0
1
1
1
1
Bit 1
0
0
1
1
0
0
1
1
Bit 0
0
1
0
1
0
1
0
1
Socket Index Example PCI I/O Address (If PCI I/O Base
Number Range
Address Is Programmed to 03E0)
0
00h—3Fh
1
40h—7Fh
2
80h—BFh
3
C0h—FFh
4
00h—3Fh
5
40h—7Fh
6
80h—BFh
7
C0h—FFh
Index Register at 03E0, Data at 03E1
Index Register at 03E0, Data at 03E1
Index Register at 03E0, Data at 03E1
Index Register at 03E0, Data at 03E1
Index Register at 03E2, Data at 03E3
Index Register at 03E2, Data at 03E3
Index Register at 03E2, Data at 03E3
Index Register at 03E2, Data at 03E3
For software compatibility with earlier CL-PD67XX PC Card host adapters, many of the
CL-PD6833 internal registers are accessible at the I/O address pair 03E0h and 03E1h by setting
a register index at one address, and then accessing the 8-bit register data at the next address.
June 1998
ADVANCE DATA BOOK v0.3
71
PCI CONFIGURATION REGISTERS