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CLRC63201T View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
CLRC63201T
NXP
NXP Semiconductors. NXP
'CLRC63201T' PDF : 127 Pages View PDF
NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
9.5.1.5 TimeSlotPeriod
When sending I-CODE1 Quit frames, it is necessary to generate the exact chronological
relationship to the start of the command frame.
If at the end of command execution TimeSlotPeriod > 0, the TimeSlotPeriod starts. If the
FIFO buffer contains data when the end of TimeSlotPeriod is reached, the data is sent. If
the FIFO buffer is empty nothing happens. As long as the TimeSlotPeriod is > 0, the
TimeSlotPeriod counter automatically starts on reaching the end.
This forms the exact time relationship between the start and finish of the command frame
used to generate and send I-CODE1 Quit frames.
When the TimeSlotPeriod > 0, the next Frame starts with exactly the same interval
TimeSlotPeriod/CoderRate delayed after each previous send frame. CoderRate defines
the clock frequency of the encoder. If TimeSlotPeriod[7:0] = 0, the send function is not
automatically triggered.
The content of the TimeSlotPeriod register can be changed while it is running but the
change is only effective after the next TimeSlotPeriod restart.
Example:
CoderRate = 0 0.5 (~52.97 kHz)
The interval should be 8.458 ms for I-CODE1 standard mode
TimeSlotPeriod = CoderRate Interval = 52.97 kHz 8.458 ms – 1 = 447 = 1BFh
Remark: The TimeSlotPeriodMSB bit is contained in the MFOUTSelect register.
COMMAND
QUIT1
QUIT2
RESPONSE1
RESPONSE2
Fig 9. TimeSlotPeriod
TSP1
TSP2
001aak612
Table 23. TimeSlotPeriod
I-CODE1 mode
standard mode
fast mode
TimeSlotPeriod for TSP1
BFh
5Fh
TimeSlotPeriod for TSP2
1BFh
67h
Remark: Set bit TxCRCEn to logic 0 before the Quit frame is sent. If TxCRCEn is not set
to logic 0, the Quit frame is sent with a calculated CRC value. Use the CRC8 algorithm to
calculate the Quit value.
CLRC632
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
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